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qemu/target
Stefan Hajnoczi df6fe2abf2 target-arm queue:
* Implement emulation of SME2p1 and SVE2p1
  * Correctly enforce alignment checks for v8M loads and
    stores done via helper functions
  * Mark the "highbank" and the "midway" machine as deprecated
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Merge tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu into staging

target-arm queue:
 * Implement emulation of SME2p1 and SVE2p1
 * Correctly enforce alignment checks for v8M loads and
   stores done via helper functions
 * Mark the "highbank" and the "midway" machine as deprecated

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# gpg: Signature made Fri 04 Jul 2025 12:23:47 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250704' of https://gitlab.com/pm215/qemu: (119 commits)
  linux-user/aarch64: Set hwcap bits for SME2p1/SVE2p1
  target/arm: Enable FEAT_SME2p1 on -cpu max
  target/arm: Implement SME2 BFMOPA (non-widening)
  target/arm: Implement FMOPA (non-widening) for fp16
  target/arm: Support FPCR.AH in SME FMOPS, BFMOPS
  target/arm: Rename BFMOPA to BFMOPA_w
  target/arm: Rename FMOPA_h to FMOPA_w_h
  target/arm: Implement LUTI2, LUTI4 for SME2/SME2p1
  target/arm: Implement MOVAZ for SME2p1
  target/arm: Implement LD1Q, ST1Q for SVE2p1
  target/arm: Implement {LD, ST}[234]Q for SME2p1/SVE2p1
  target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h
  target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1
  target/arm: Split the ST_zpri and ST_zprr patterns
  target/arm: Implement SME2 counted predicate register load/store
  target/arm: Implement TBLQ, TBXQ for SME2p1/SVE2p1
  target/arm: Implement ZIPQ, UZPQ for SME2p1/SVE2p1
  target/arm: Implement PMOV for SME2p1/SVE2p1
  target/arm: Implement EXTQ for SME2p1/SVE2p1
  target/arm: Implement DUPQ for SME2p1/SVE2p1
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
5 days ago
..
alpha target: Use cpu_pointer_wrap_notreached for strict align targets 2 months ago
arm target-arm queue: 5 days ago
avr target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2 months ago
hppa target: Use cpu_pointer_wrap_notreached for strict align targets 2 months ago
i386 accel/system: Convert pre_resume() from AccelOpsClass to AccelClass 1 week ago
loongarch treewide: fix paths for relocated files in comments 1 week ago
m68k target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
microblaze target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
mips * target/i386/kvm: Intel TDX support 1 month ago
openrisc target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
ppc * target/i386/kvm: Intel TDX support 1 month ago
riscv target: riscv: Add Svrsw60t59b extension support 1 week ago
rx target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
s390x target/s390x: A fix for the trouble with tribles 1 week ago
sh4 target: Use cpu_pointer_wrap_notreached for strict align targets 2 months ago
sparc accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW 1 month ago
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2 months ago
xtensa target/xtensa: replace FSF postal address with licenses URL 2 weeks ago
Kconfig target/cris: Remove the deprecated CRIS target 10 months ago
meson.build target/cris: Remove the deprecated CRIS target 10 months ago