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![]() In gen_mcrfs() the FPSCR nibble mask is computed as: `~((0xF << shift) & FP_EX_CLEAR_BITS)` Here, 0xF is of type int, so the left shift is performed in 32-bit signed arithmetic. For bfa=0 we get shift=28, and (0xF << 28) = 0xF0000000, which is not representable as a 32-bit signed int. Static analyzers flag this as a potential integer overflow. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Denis Sergeev <zeff@altlinux.org> Reviewed-by: Chinmay Rath <rathc@linux.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Link: https://lore.kernel.org/r/20250915080118.29898-1-zeff@altlinux.org Message-ID: <20250915080118.29898-1-zeff@altlinux.org> |
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arch_dump.c | 10 months ago | |
compat.c | 10 months ago | |
cpu-models.c | 2 weeks ago | |
cpu-models.h | 2 weeks ago | |
cpu-param.h | 6 months ago | |
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cpu.c | 6 months ago | |
cpu.h | 2 weeks ago | |
cpu_init.c | 2 weeks ago | |
cpu_init.h | 11 months ago | |
dfp_helper.c | 1 year ago | |
excp_helper.c | 2 weeks ago | |
fpu_helper.c | 2 weeks ago | |
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helper.h | 2 weeks ago | |
helper_regs.c | 2 weeks ago | |
helper_regs.h | 6 months ago | |
insn32.decode | 2 weeks ago | |
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internal.h | 6 months ago | |
kvm.c | 1 month ago | |
kvm_ppc.h | 6 months ago | |
machine.c | 6 months ago | |
mem_helper.c | 6 months ago | |
meson.build | 7 months ago | |
misc_helper.c | 1 month ago | |
mmu-book3s-v3.c | 6 months ago | |
mmu-book3s-v3.h | 1 year ago | |
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mmu-hash32.c | 6 months ago | |
mmu-hash32.h | 6 months ago | |
mmu-hash64.c | 6 months ago | |
mmu-hash64.h | 3 months ago | |
mmu-radix64.c | 6 months ago | |
mmu-radix64.h | 1 year ago | |
mmu_common.c | 6 months ago | |
mmu_helper.c | 6 months ago | |
power8-pmu-regs.c.inc | ||
power8-pmu.c | 6 months ago | |
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ppc-qmp-cmds.c | 5 months ago | |
spr_common.h | 7 months ago | |
tcg-excp_helper.c | 2 weeks ago | |
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timebase_helper.c | 6 months ago | |
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translate.c | 2 weeks ago | |
user_only_helper.c | 6 months ago |