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3072961b6e
linux-user: implement pgid field of /proc/self/stat target/sh4: Use MO_ALIGN for system UNALIGN() target/microblaze: Use TARGET_LONG_BITS == 32 for system mode accel/tcg: Add TCGCPUOps.pointer_wrap target/*: Populate TCGCPUOps.pointer_wrap -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmg2xZAdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/VmAgAu5PHIARUuNqneUPQ 2JxqpZHGVbaXE0ACi9cslpfThFM/I4OXmK21ZWb1dHB3qasNiKU8cdImXSUVH3dj DLsr/tliReerZGUoHEtFsYd+VOtqb3wcrvXxnzG/xB761uZjFCnqwy4MrXMfSXVh 6w+eysWOblYHQb9rAZho4nyw6BgjYAX2vfMFxLJBcDP/fjILFB7xoXHEyqKWMmE1 0enA0KUotyLOCRXVEXSsfPDYD8szXfMkII3YcGnscthm5j58oc3skVdKFGVjNkNb /aFpyvoU7Vp3JpxkYEIWLQrRM75VSb1KzJwMipHgYy3GoV++BrY10T0jyEPrx0iq RFzK4A== =XQzq -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu into staging accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW linux-user: implement pgid field of /proc/self/stat target/sh4: Use MO_ALIGN for system UNALIGN() target/microblaze: Use TARGET_LONG_BITS == 32 for system mode accel/tcg: Add TCGCPUOps.pointer_wrap target/*: Populate TCGCPUOps.pointer_wrap # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmg2xZAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/VmAgAu5PHIARUuNqneUPQ # 2JxqpZHGVbaXE0ACi9cslpfThFM/I4OXmK21ZWb1dHB3qasNiKU8cdImXSUVH3dj # DLsr/tliReerZGUoHEtFsYd+VOtqb3wcrvXxnzG/xB761uZjFCnqwy4MrXMfSXVh # 6w+eysWOblYHQb9rAZho4nyw6BgjYAX2vfMFxLJBcDP/fjILFB7xoXHEyqKWMmE1 # 0enA0KUotyLOCRXVEXSsfPDYD8szXfMkII3YcGnscthm5j58oc3skVdKFGVjNkNb # /aFpyvoU7Vp3JpxkYEIWLQrRM75VSb1KzJwMipHgYy3GoV++BrY10T0jyEPrx0iq # RFzK4A== # =XQzq # -----END PGP SIGNATURE----- # gpg: Signature made Wed 28 May 2025 04:13:04 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu: (28 commits) accel/tcg: Assert TCGCPUOps.pointer_wrap is set target/sparc: Fill in TCGCPUOps.pointer_wrap target/s390x: Fill in TCGCPUOps.pointer_wrap target/riscv: Fill in TCGCPUOps.pointer_wrap target/ppc: Fill in TCGCPUOps.pointer_wrap target/mips: Fill in TCGCPUOps.pointer_wrap target/loongarch: Fill in TCGCPUOps.pointer_wrap target/i386: Fill in TCGCPUOps.pointer_wrap target/arm: Fill in TCGCPUOps.pointer_wrap target: Use cpu_pointer_wrap_uint32 for 32-bit targets target: Use cpu_pointer_wrap_notreached for strict align targets accel/tcg: Add TCGCPUOps.pointer_wrap target/sh4: Use MO_ALIGN for system UNALIGN() tcg: Drop TCGContext.page_{mask,bits} tcg: Drop TCGContext.tlb_dyn_max_bits target/microblaze: Simplify compute_ldst_addr_type{a,b} target/microblaze: Drop DisasContext.r0 target/microblaze: Use TARGET_LONG_BITS == 32 for system mode target/microblaze: Fix printf format in mmu_translate target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
1 week ago | |
|---|---|---|
| .. | ||
| Kconfig | ||
| asi.h | 1 year ago | |
| cpu-feature.h.inc | 1 year ago | |
| cpu-param.h | 2 months ago | |
| cpu-qom.h | 2 years ago | |
| cpu.c | 2 weeks ago | |
| cpu.h | 1 month ago | |
| fop_helper.c | 2 weeks ago | |
| gdbstub.c | 4 months ago | |
| helper.c | 1 month ago | |
| helper.h | 6 months ago | |
| insns.decode | 4 months ago | |
| int32_helper.c | 2 months ago | |
| int64_helper.c | 1 year ago | |
| ldst_helper.c | 1 month ago | |
| machine.c | 1 month ago | |
| meson.build | 2 years ago | |
| mmu_helper.c | 2 months ago | |
| monitor.c | 2 years ago | |
| trace-events | ||
| trace.h | ||
| translate.c | 1 month ago | |
| translate.h | 6 months ago | |
| vis_helper.c | 1 year ago | |
| win_helper.c | 1 month ago | |