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167 lines
3.8 KiB
ArmAsm
167 lines
3.8 KiB
ArmAsm
#include "core-isa.h"
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#ifndef XCHAL_VECBASE_RESET_VADDR
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#define XCHAL_VECBASE_RESET_VADDR XCHAL_WINDOW_VECTORS_VADDR
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#define XCHAL_WINDOW_OF4_VECOFS 0x00000000
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#define XCHAL_WINDOW_UF4_VECOFS 0x00000040
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#define XCHAL_WINDOW_OF8_VECOFS 0x00000080
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#define XCHAL_WINDOW_UF8_VECOFS 0x000000C0
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#define XCHAL_WINDOW_OF12_VECOFS 0x00000100
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#define XCHAL_WINDOW_UF12_VECOFS 0x00000140
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#endif
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#define RAM_SIZE 0x08000000 /* 128M */
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#define ROM_SIZE 0x00001000 /* 4k */
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#define VECTORS_RESERVED_SIZE 0x1000
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#if XCHAL_HAVE_BE
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OUTPUT_FORMAT("elf32-xtensa-be")
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#else
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OUTPUT_FORMAT("elf32-xtensa-le")
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#endif
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ENTRY(_start)
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MEMORY {
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ram : ORIGIN = XCHAL_VECBASE_RESET_VADDR, LENGTH = RAM_SIZE
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rom : ORIGIN = XCHAL_RESET_VECTOR_VADDR, LENGTH = ROM_SIZE
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}
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SECTIONS
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{
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.init :
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{
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*(.init)
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*(.init.*)
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} > rom
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#if XCHAL_HAVE_WINDOWED
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.vector.window XCHAL_WINDOW_VECTORS_VADDR :
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{
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. = XCHAL_WINDOW_OF4_VECOFS;
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*(.vector.window_overflow_4)
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. = XCHAL_WINDOW_UF4_VECOFS;
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*(.vector.window_underflow_4)
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. = XCHAL_WINDOW_OF8_VECOFS;
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*(.vector.window_overflow_8)
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. = XCHAL_WINDOW_UF8_VECOFS;
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*(.vector.window_underflow_8)
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. = XCHAL_WINDOW_OF12_VECOFS;
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*(.vector.window_overflow_12)
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. = XCHAL_WINDOW_UF12_VECOFS;
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*(.vector.window_underflow_12)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
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.vector.level2 XCHAL_INTLEVEL2_VECTOR_VADDR :
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{
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*(.vector.level2)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
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.vector.level3 XCHAL_INTLEVEL3_VECTOR_VADDR :
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{
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*(.vector.level3)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
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.vector.level4 XCHAL_INTLEVEL4_VECTOR_VADDR :
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{
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*(.vector.level4)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
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.vector.level5 XCHAL_INTLEVEL5_VECTOR_VADDR :
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{
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*(.vector.level5)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
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.vector.level6 XCHAL_INTLEVEL6_VECTOR_VADDR :
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{
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*(.vector.level6)
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}
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
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.vector.level7 XCHAL_INTLEVEL7_VECTOR_VADDR :
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{
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*(.vector.level7)
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}
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#endif
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.vector.kernel XCHAL_KERNEL_VECTOR_VADDR :
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{
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*(.vector.kernel)
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}
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.vector.user XCHAL_USER_VECTOR_VADDR :
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{
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*(.vector.user)
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}
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.vector.double XCHAL_DOUBLEEXC_VECTOR_VADDR :
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{
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*(.vector.double)
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}
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.vector.text XCHAL_VECBASE_RESET_VADDR + VECTORS_RESERVED_SIZE :
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{
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*(.vector.window_overflow_4.*)
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*(.vector.window_underflow_4.*)
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*(.vector.window_overflow_8.*)
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*(.vector.window_underflow_8.*)
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*(.vector.window_overflow_12.*)
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*(.vector.window_underflow_12.*)
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*(.vector.level2.*)
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*(.vector.level3.*)
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*(.vector.level4.*)
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*(.vector.level5.*)
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*(.vector.level6.*)
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*(.vector.level7.*)
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*(.vector.kernel.*)
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*(.vector.user.*)
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*(.vector.double.*)
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} > ram
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.text :
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{
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_ftext = .;
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*(.text .stub .text.* .gnu.linkonce.t.* .literal .literal.*)
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_etext = .;
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} > ram
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.rodata :
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{
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. = ALIGN(4);
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_frodata = .;
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.rodata1)
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_erodata = .;
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} > ram
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.data :
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{
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. = ALIGN(4);
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_fdata = .;
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*(.data .data.* .gnu.linkonce.d.*)
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*(.data1)
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_gp = ALIGN(16);
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*(.sdata .sdata.* .gnu.linkonce.s.*)
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_edata = .;
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} > ram
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.bss :
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{
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. = ALIGN(4);
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_fbss = .;
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*(.dynsbss)
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*(.sbss .sbss.* .gnu.linkonce.sb.*)
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*(.scommon)
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*(.dynbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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_ebss = .;
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_end = .;
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} > ram
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}
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PROVIDE(_fstack = (ORIGIN(ram) & 0xf0000000) + LENGTH(ram) - 16);
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