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d1bb978ba1
Unlike the memory case, where "the destination operand receives a write cycle without regard to the result of the comparison", rm must not be touched altogether if the write fails, including not zero-extending it on 64-bit processors. This is not how the movcond currently works, because it is always followed by a gen_op_mov_reg_v to rm. To fix it, introduce a new function that is similar to gen_op_mov_reg_v but writes to a TCG temporary. Considering that gen_extu(ot, oldv) is not needed in the memory case either, the two cases for register and memory destinations are different enough that one might as well fuse the two "if (mod == 3)" into one. So do that too. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/508 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Add a test case ] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| aarch64 | 2 years ago | |
| alpha | 5 years ago | |
| arm | 2 years ago | |
| cris | 2 years ago | |
| hexagon | 2 years ago | |
| hppa | 3 years ago | |
| i386 | 2 years ago | |
| loongarch64 | 2 years ago | |
| m68k | 3 years ago | |
| minilib | 3 years ago | |
| mips | 5 years ago | |
| multiarch | 2 years ago | |
| nios2 | 2 years ago | |
| openrisc | 8 years ago | |
| ppc | 5 years ago | |
| ppc64 | 2 years ago | |
| ppc64le | 2 years ago | |
| riscv64 | 2 years ago | |
| s390x | 2 years ago | |
| sh4 | 2 years ago | |
| sparc64 | 4 years ago | |
| tricore | 4 years ago | |
| x86_64 | 2 years ago | |
| xtensa | 3 years ago | |
| Makefile.target | 2 years ago | |
| README | 4 years ago | |
README
This directory contains various interesting guest programs for regression testing. Tests are either multi-arch, meaning they can be built for all guest architectures that support linux-user executable, or they are architecture specific. CRIS ==== The testsuite for CRIS is in tests/tcg/cris. You can run it with "make test-cris".