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Max Filippov 4be4c5b826 tests/tcg/xtensa: fix vectors and checks in timer test ... Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		4 years ago
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Makefile.softmmu-target	Replace TARGET_WORDS_BIGENDIAN	4 years ago
crt.S	tests/tcg/xtensa: fix build for cores without windowed registers	4 years ago
fpu.h	tests/tcg/xtensa: update test_fp0_arith for DFPU	5 years ago
linker.ld.S	tests/tcg/xtensa: support configurations w/o vecbase	7 years ago
macros.inc	tests/tcg/xtensa: fix test execution on ISS	5 years ago
test_b.S	tests/tcg/xtensa: fix endianness issues in test_b	7 years ago
test_bi.S	target-xtensa: allow using core configuration in tests	12 years ago
test_boolean.S	tests/tcg/xtensa: enable boolean tests	7 years ago
test_break.S	tests/tcg/xtensa: fix watchpoint test	4 years ago
test_bz.S	target-xtensa: allow using core configuration in tests	12 years ago
test_cache.S	tests/tcg/xtensa: conditionalize cache option tests	7 years ago
test_clamps.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_dfp0_arith.S	tests/tcg/xtensa: add DFP0 arithmetic tests	5 years ago
test_exclusive.S	target/xtensa: implement exclusive access option	7 years ago
test_extui.S	target-xtensa: allow using core configuration in tests	12 years ago
test_flix.S	target/xtensa: fix break_dependency for repeated resources	7 years ago
test_fp0_arith.S	tests/tcg/xtensa: expand madd tests	5 years ago
test_fp0_conv.S	tests/tcg/xtensa: update test_fp0_conv for DFPU	5 years ago
test_fp0_div.S	tests/tcg/xtensa: add fp0 div and sqrt tests	5 years ago
test_fp0_sqrt.S	tests/tcg/xtensa: add fp0 div and sqrt tests	5 years ago
test_fp1.S	tests/tcg/xtensa: update test_fp1 for DFPU	5 years ago
test_fp_cpenable.S	tests/tcg/xtensa: add FPU2000 coprocessor tests	7 years ago
test_interrupt.S	tests/tcg/xtensa: conditionalize interrupt tests	7 years ago
test_load_store.S	target/xtensa: clean up unaligned access	5 years ago
test_loop.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_lsc.S	tests/tcg/xtensa: test double precision load/store	5 years ago
test_mac16.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_max.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_min.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_mmu.S	tests/tcg/xtensa: enable mmu tests for MMUv3	4 years ago
test_mul16.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_mul32.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_nsa.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_phys_mem.S	tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3	4 years ago
test_quo.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_rem.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_rst0.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_s32c1i.S	tests/tcg/xtensa: conditionalize and fix s32c1i tests	7 years ago
test_sar.S	target-xtensa: allow using core configuration in tests	12 years ago
test_sext.S	tests/tcg/xtensa: add straightforward conditionals	7 years ago
test_shift.S	target-xtensa: allow using core configuration in tests	12 years ago
test_sr.S	tests/tcg/xtensa: restore vecbase SR after test	4 years ago
test_timer.S	tests/tcg/xtensa: fix vectors and checks in timer test	4 years ago
test_windowed.S	tests/tcg/xtensa: conditionalize windowed register tests	7 years ago
vectors.S	tests/tcg/xtensa: support configurations w/o vecbase	7 years ago