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Stefan Hajnoczi 08a5d04606 Revert incorrect cflags initialization. ... Add direct jumps for tcg/loongarch64. Speed up breakpoint check. Improve assertions for atomic.h. Move restore_state_to_opc to TCGCPUOps. Cleanups to TranslationBlock maintenance. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNYlo4dHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9y2wf9EKsCA6VtYI2Qtftf q/ujYFmUf8AKTb9eVcA0XX71CT1dEnFR7GQyT8B8X13x0pSbOX7tbEWHPreegTFV tESiejvymi6Q9devAB58GVwNoU/zPIQQGhCPxkVUKDmRztJz22MbGUzd7UKPPgU8 2nVMkIpLTMBsKeFLxE/D3ZntmdKsgyI/1Dtkl9TxvlDGsCbMjbNcr8lM+TLaG2oX GZhFyJHKEVy0cobukvhhb/9rU7AWdG/BnFmZM16JxvHV/YCwJBx3Udhcy9xPePUU yIjkGsUAq4aB6H9RFuTWh7GmaY5u6gMbTTi2J7hDos0mzauYJtpgEB/H42LpycGE sOhkLQ== =DUb8 -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20221026' of https://gitlab.com/rth7680/qemu into staging Revert incorrect cflags initialization. Add direct jumps for tcg/loongarch64. Speed up breakpoint check. Improve assertions for atomic.h. Move restore_state_to_opc to TCGCPUOps. Cleanups to TranslationBlock maintenance. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNYlo4dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9y2wf9EKsCA6VtYI2Qtftf # q/ujYFmUf8AKTb9eVcA0XX71CT1dEnFR7GQyT8B8X13x0pSbOX7tbEWHPreegTFV # tESiejvymi6Q9devAB58GVwNoU/zPIQQGhCPxkVUKDmRztJz22MbGUzd7UKPPgU8 # 2nVMkIpLTMBsKeFLxE/D3ZntmdKsgyI/1Dtkl9TxvlDGsCbMjbNcr8lM+TLaG2oX # GZhFyJHKEVy0cobukvhhb/9rU7AWdG/BnFmZM16JxvHV/YCwJBx3Udhcy9xPePUU # yIjkGsUAq4aB6H9RFuTWh7GmaY5u6gMbTTi2J7hDos0mzauYJtpgEB/H42LpycGE # sOhkLQ== # =DUb8 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 25 Oct 2022 22:08:14 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20221026' of https://gitlab.com/rth7680/qemu: (47 commits) accel/tcg: Remove restore_state_to_opc function target/xtensa: Convert to tcg_ops restore_state_to_opc target/tricore: Convert to tcg_ops restore_state_to_opc target/sparc: Convert to tcg_ops restore_state_to_opc target/sh4: Convert to tcg_ops restore_state_to_opc target/s390x: Convert to tcg_ops restore_state_to_opc target/rx: Convert to tcg_ops restore_state_to_opc target/riscv: Convert to tcg_ops restore_state_to_opc target/ppc: Convert to tcg_ops restore_state_to_opc target/openrisc: Convert to tcg_ops restore_state_to_opc target/nios2: Convert to tcg_ops restore_state_to_opc target/mips: Convert to tcg_ops restore_state_to_opc target/microblaze: Convert to tcg_ops restore_state_to_opc target/m68k: Convert to tcg_ops restore_state_to_opc target/loongarch: Convert to tcg_ops restore_state_to_opc target/i386: Convert to tcg_ops restore_state_to_opc target/hppa: Convert to tcg_ops restore_state_to_opc target/hexagon: Convert to tcg_ops restore_state_to_opc target/cris: Convert to tcg_ops restore_state_to_opc target/avr: Convert to tcg_ops restore_state_to_opc ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>		2 years ago
..
insn_trans	target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unordered	2 years ago
Kconfig	meson: Introduce target-specific Kconfig	3 years ago
XVentanaCondOps.decode	target/riscv: Add XVentanaCondOps custom extension	3 years ago
arch_dump.c	dump: Replace opaque DumpState pointer with a typed one	2 years ago
bitmanip_helper.c	target/riscv: rvk: add support for zbkx extension	3 years ago
common-semi-target.h	semihosting: Split out common-semi-target.h	2 years ago
cpu-param.h	Normalize header guard symbol definition	3 years ago
cpu.c	target/riscv: Convert to tcg_ops restore_state_to_opc	2 years ago
cpu.h	dump: Replace opaque DumpState pointer with a typed one	2 years ago
cpu_bits.h	target/riscv: debug: Introduce tinfo CSR	2 years ago
cpu_helper.c	target/riscv: Honour -semihosting-config userspace=on and enable=on	2 years ago
cpu_user.h	Supply missing header guards	6 years ago
crypto_helper.c	target/riscv: rvk: add support for zksed/zksh extension	3 years ago
csr.c	target/riscv: debug: Introduce tinfo CSR	2 years ago
debug.c	target/riscv: debug: Add initial support of type 6 trigger	2 years ago
debug.h	target/riscv: debug: Add initial support of type 6 trigger	2 years ago
fpu_helper.c	target/riscv: add support for zhinx/zhinxmin	3 years ago
gdbstub.c	target/riscv: Check the correct exception cause in vector GDB stub	2 years ago
helper.h	target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unordered	2 years ago
insn16.decode	target/riscv: fix shifts shamt value for rv128c	2 years ago
insn32.decode	target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unordered	2 years ago
instmap.h	target/riscv: Update [m|h]tinst CSR in riscv_cpu_do_interrupt()	2 years ago
internals.h	target/riscv: rvv: Add mask agnostic for vv instructions	2 years ago
kvm-stub.c	target/riscv: Support setting external interrupt by KVM	3 years ago
kvm.c	kvm: allow target-specific accelerator properties	2 years ago
kvm_riscv.h	target/riscv: Support setting external interrupt by KVM	3 years ago
m128_helper.c	target/riscv: support for 128-bit M extension	3 years ago
machine.c	target/riscv: debug: Introduce tdata1, tdata2, and tdata3 CSRs	2 years ago
meson.build	target/riscv: Add stimecmp support	2 years ago
monitor.c	target/riscv: Fix incorrect PTE merge in walk_pte	3 years ago
op_helper.c	target/riscv: rvk: add CSR support for Zkr	3 years ago
pmp.c	target/riscv: pmp: Fixup TLB size calculation	2 years ago
pmp.h	target/riscv: rvk: add CSR support for Zkr	3 years ago
pmu.c	hw/riscv: virt: Add PMU DT node to the device tree	2 years ago
pmu.h	hw/riscv: virt: Add PMU DT node to the device tree	2 years ago
sbi_ecall_interface.h	Clean up ill-advised or unusual header guards	3 years ago
time_helper.c	target/riscv: Add vstimecmp support	2 years ago
time_helper.h	target/riscv: Add stimecmp support	2 years ago
trace-events	target/riscv: Add ePMP CSR access functions	4 years ago
trace.h	trace: switch position of headers to what Meson requires	4 years ago
translate.c	target/riscv: Honour -semihosting-config userspace=on and enable=on	2 years ago
vector_helper.c	treewide: Remove the unnecessary space before semicolon	2 years ago