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${ noResults }
Alexandre Ghiti
dc8bffc4eb
target: riscv: Add Svrsw60t59b extension support
The Svrsw60t59b extension allows to free the PTE reserved bits 60 and 59 for software to use. Reviewed-by: Deepak Gupta <debug@rivosinc.com> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com> Message-ID: <20250702-dev-alex-svrsw60b59b_v2-v2-1-504ddf0f8530@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
1 month ago | |
|---|---|---|
| .. | ||
| meson.build | target/riscv: introduce TCG AccelCPUClass | 2 years ago |
| tcg-cpu.c | target: riscv: Add Svrsw60t59b extension support | 1 month ago |
| tcg-cpu.h | target/riscv: Remove AccelCPUClass::cpu_class_init need | 4 months ago |