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qemu/target/arm/tcg
Richard Henderson 53b41bb789 target-arm queue:
*  hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types
  * docs/system/arm/virt: Document user-creatable SMMUv3
  * docs/system/security: Restrict "virtualization use case" to specific machines
  * target/arm: Add assert to arm_to_core_mmu_idx()
  * hw/arm/virt: remove deprecated virt-4.1 and virt-4.2 machine types
  * hvf: Refactorings and cleanups
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Merge tag 'pull-target-arm-20251031' of https://gitlab.com/pm215/qemu into staging

target-arm queue:
 *  hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types
 * docs/system/arm/virt: Document user-creatable SMMUv3
 * docs/system/security: Restrict "virtualization use case" to specific machines
 * target/arm: Add assert to arm_to_core_mmu_idx()
 * hw/arm/virt: remove deprecated virt-4.1 and virt-4.2 machine types
 * hvf: Refactorings and cleanups

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# gpg: Signature made Fri 31 Oct 2025 07:32:07 PM CET
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20251031' of https://gitlab.com/pm215/qemu: (38 commits)
  accel/hvf: Trace prefetch abort
  target/arm/hvf/hvf: Document $pc adjustment in HVF & SMC
  target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF
  target/arm: Re-use arm_is_psci_call() in HVF
  target/arm/hvf: Rename 'vgic' -> 'emu_reginfo' in trace events
  target/arm: Rename init_cpreg_list() -> arm_init_cpreg_list()
  accel/hvf: Restrict ARM specific fields of AccelCPUState
  target/arm: Call aarch64_add_pauth_properties() once in host_initfn()
  accel/hvf: Guard hv_vcpu_run() between cpu_exec_start/end() calls
  cpus: Trace cpu_exec_start() and cpu_exec_end() calls
  target/arm/hvf: Keep calling hv_vcpu_run() in loop
  target/arm/hvf: Factor hvf_handle_vmexit() out
  target/i386/hvf: Factor hvf_handle_vmexit() out
  target/arm/hvf: Factor hvf_handle_exception() out
  target/arm/hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU
  target/arm/hvf: Simplify hvf_arm_get_host_cpu_features()
  target/arm/hvf: Hardcode Apple MIDR
  accel/hvf: Implement hvf_arch_vcpu_destroy()
  target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread
  accel/hvf: Mention hvf_arch_update_guest_debug() must run on vCPU
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
1 week ago
..
a32-uncond.decode
a32.decode
a64.decode target/arm: Implement GCSB 1 month ago
arith_helper.c target/arm/tcg/arith_helper: compile file once 6 months ago
arm_ldst.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 3 years ago
cpregs-at.c target/arm: Implement FEAT_ATS1A 2 months ago
cpu-v7m.c arm/cpu: store clidr into the idregs array 4 months ago
cpu32.c target/arm: Remove deprecated pxa CPU family 2 months ago
cpu64.c target/arm: Enable FEAT_AIE for -cpu max 3 weeks ago
crypto_helper.c target/arm/tcg/crypto_helper: compile file once 6 months ago
gengvec.c target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte 11 months ago
gengvec64.c target/arm: Introduce gen_gvec_sve2_sqdmulh 4 months ago
helper-a64.c target/arm: Implement EXLOCK check during exception return 1 month ago
helper-a64.h target/arm: Make helper_exception_return system-only 1 month ago
helper-mve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 3 years ago
helper-sme.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 4 months ago
helper-sve.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 4 months ago
helper.h target/arm: Remove iwmmxt helper functions 2 months ago
hflags.c target/arm: Add GCS enable and trap levels to DisasContext 1 month ago
m-nocp.decode
m_helper.c target/arm: call plugin trap callbacks 2 weeks ago
meson.build target/arm: Remove iwmmxt helper functions 2 months ago
mte_helper.c target/arm: Remove unused env argument from regime_el 1 month ago
mte_helper.h target/arm: Make some MTE helpers widely available 1 year ago
mve.decode
mve_helper.c target/arm: Move do_urshr, do_srshr to vec_internal.h 4 months ago
neon-dp.decode target/arm: Convert VQSHL, VQSHLU to gvec 1 year ago
neon-ls.decode
neon-shared.decode
neon_helper.c target/arm: Implement SME2 Multiple and Single SVE Destructive 4 months ago
op_addsub.c.inc target/arm: Move minor arithmetic helpers out of helper.c 10 months ago
op_helper.c target/arm: Implement EXLOCKException for ELR_ELx and SPSR_ELx 1 month ago
pauth_helper.c include: Remove 'exec/exec-all.h' 6 months ago
psci.c target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF 2 weeks ago
sme-fa64.decode
sme.decode target/arm: Implement SME2 BFMOPA (non-widening) 4 months ago
sme_helper.c target/arm: Pack mtedesc into upper 32 bits of descriptor 4 months ago
sve.decode target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 4 months ago
sve_helper.c target/arm: Fix LD1W, LD1D to 128-bit elements 4 months ago
sve_ldst_internal.h target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h 4 months ago
t16.decode
t32.decode target/arm: Use PLD, PLDW, PLI not NOP for t32 1 year ago
tlb-insns.c target/arm: Introduce mmu indexes for GCS 1 month ago
tlb_helper.c target/arm: Implement gcs bit for data abort 1 month ago
translate-a32.h target/arm: Implement store_cpu_field_low32() macro 1 year ago
translate-a64.c accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY 2 weeks ago
translate-a64.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 4 months ago
translate-m-nocp.c target/arm: Rename FPCR_ QC, NZCV macros to FPSR_ 1 year ago
translate-mve.c tcg: Rename cpu_env to tcg_env 2 years ago
translate-neon.c accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY 2 weeks ago
translate-sme.c target/arm: Expand the descriptor for SME/SVE memory ops to i64 4 months ago
translate-sve.c target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 4 months ago
translate-vfp.c target/arm: Use FPST_A32_F16 in A32 decoder 10 months ago
translate.c accel/tcg: Name gen_goto_tb()'s TB slot index as @tb_slot_idx 4 weeks ago
translate.h accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY 2 weeks ago
vec_helper.c target/arm: Add BFMUL (indexed) 4 months ago
vec_internal.h target/arm: Support FPCR.AH in SME FMOPS, BFMOPS 4 months ago
vfp-uncond.decode
vfp.decode target/arm: Correct names of VFP VFNMA and VFNMS insns 1 year ago
vfp_helper.c target/arm: Introduce FPST_ZA, FPST_ZA_F16 4 months ago