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qemu/target/arm/tcg
Peter Maydell 7428c46c06 target/arm: Fix LD1W, LD1D to 128-bit elements
In our implementation of the SVE2p1 contiguous load to 128-bit
element insns such as LD1D (scalar plus scalar, single register), we
got the order of the arguments to the DO_LD1_2() macro wrong.  Here
the first argument is the element size and the second is the memory
size, and the element size is always the same size or larger than
the memory size.

For the 128-bit versions, we want to load either 32-bit or 64-bit
values from memory and extend them to the 128-bit vector element, but
were trying to load 128 bit values and then stuff them into 32-bit or
64-bit vector elements.  Correct the macro ordering.

Fixes: fc5f060bcb ("target/arm: Implement {LD1, ST1}{W, D} (128-bit element) for SVE2p1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250723165458.3509150-7-peter.maydell@linaro.org
2 weeks ago
..
a32-uncond.decode
a32.decode
a64.decode target/arm: Add decodetree entry for DSB nXS variant 8 months ago
arith_helper.c target/arm/tcg/arith_helper: compile file once 3 months ago
arm_ldst.h
cpregs-at.c target/arm: Split out AT insns to tcg/cpregs-at.c 1 month ago
cpu-v7m.c arm/cpu: store clidr into the idregs array 1 month ago
cpu32.c arm/cpu: store clidr into the idregs array 1 month ago
cpu64.c arm/cpu: store clidr into the idregs array 1 month ago
crypto_helper.c target/arm/tcg/crypto_helper: compile file once 3 months ago
gengvec.c target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte 8 months ago
gengvec64.c target/arm: Introduce gen_gvec_sve2_sqdmulh 1 month ago
helper-a64.c target/arm: Don't enforce NSE,NS check for EL3->EL3 returns 1 month ago
helper-a64.h target/arm: Handle FPCR.AH in FRECPS and FRSQRTS scalar insns 6 months ago
helper-mve.h
helper-sme.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2 weeks ago
helper-sve.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2 weeks ago
helper.h target/arm: Add BFMUL (indexed) 3 weeks ago
hflags.c target/arm: Add zt0_excp_el to DisasContext 1 month ago
iwmmxt_helper.c target/arm/tcg/iwmmxt_helper: compile file twice (system, user) 3 months ago
m-nocp.decode
m_helper.c target/arm: Fix function_return helper load alignment checks 1 month ago
meson.build target/arm: Split out AT insns to tcg/cpregs-at.c 1 month ago
mte_helper.c accel/tcg: Remove TARGET_PAGE_DATA_SIZE 3 months ago
mte_helper.h
mve.decode
mve_helper.c target/arm: Move do_urshr, do_srshr to vec_internal.h 1 month ago
neon-dp.decode target/arm: Convert VQSHL, VQSHLU to gvec 11 months ago
neon-ls.decode
neon-shared.decode
neon_helper.c target/arm: Implement SME2 Multiple and Single SVE Destructive 1 month ago
op_addsub.c.inc target/arm: Move minor arithmetic helpers out of helper.c 7 months ago
op_helper.c target/arm/helper: use vaddr instead of target_ulong for probe_access 3 months ago
pauth_helper.c include: Remove 'exec/exec-all.h' 3 months ago
psci.c include: Rename sysemu/ -> system/ 8 months ago
sme-fa64.decode
sme.decode target/arm: Implement SME2 BFMOPA (non-widening) 1 month ago
sme_helper.c target/arm: Pack mtedesc into upper 32 bits of descriptor 2 weeks ago
sve.decode target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 2 weeks ago
sve_helper.c target/arm: Fix LD1W, LD1D to 128-bit elements 2 weeks ago
sve_ldst_internal.h target/arm: Move ld1qq and st1qq primitives to sve_ldst_internal.h 1 month ago
t16.decode
t32.decode
tlb-insns.c target/arm/tcg/tlb-insns: compile file once (system) 3 months ago
tlb_helper.c target/arm/tcg/tlb_helper: compile file twice (system, user) 3 months ago
translate-a32.h
translate-a64.c target/arm: Rename helper_gvec_*dot_[bh] to *_4[bh] 1 month ago
translate-a64.h target/arm: Expand the descriptor for SME/SVE memory ops to i64 2 weeks ago
translate-m-nocp.c
translate-mve.c
translate-neon.c target/arm: Rename gvec_fml[as]_[hs] with _nf_ infix 1 month ago
translate-sme.c target/arm: Expand the descriptor for SME/SVE memory ops to i64 2 weeks ago
translate-sve.c target/arm: LD1Q, ST1Q are vector + scalar, not scalar + vector 2 weeks ago
translate-vfp.c target/arm: Use FPST_A32_F16 in A32 decoder 7 months ago
translate.c target/arm: Unify gen_exception_internal() 1 month ago
translate.h target/arm: Implement SME2 ADD/SUB (array results, multiple and single vector) 1 month ago
vec_helper.c target/arm: Add BFMUL (indexed) 3 weeks ago
vec_internal.h target/arm: Support FPCR.AH in SME FMOPS, BFMOPS 1 month ago
vfp-uncond.decode
vfp.decode
vfp_helper.c target/arm: Introduce FPST_ZA, FPST_ZA_F16 1 month ago