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qemu/target/mips/tcg/system
Denis Rastyogin 1f82ca7234 target/mips: fix TLB huge page check to use 64-bit shift
Use extract64(entry, psn, 1) instead of (entry & (1 << psn)) to avoid
undefined behavior for shifts by 32–63 and to make bit extraction intent explicit.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Denis Rastyogin <gerben@altlinux.org>
Message-ID: <20250814104914.13101-1-gerben@altlinux.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
1 week ago
..
cp0_helper.c target/mips: Only update MVPControl.EVP bit if executed by master VPE 1 month ago
lcsr_helper.c include: Rename sysemu/ -> system/ 9 months ago
meson.build include: Rename sysemu/ -> system/ 9 months ago
mips-semi.c cleanup: Drop pointless return at end of function 5 months ago
semihosting-stub.c licenses: Remove SPDX tags not being license identifier for Linaro 7 months ago
special_helper.c include: Remove 'exec/exec-all.h' 4 months ago
tlb_helper.c target/mips: fix TLB huge page check to use 64-bit shift 1 week ago