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xserver with xephyr scale patch
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DDC.HOWTO (3742B)


      1 			DDC.HOWTO
      2 
      3   This file describes how to add DDC support to a chipset driver.
      4 
      5 1) DDC INITIALIZATION
      6 
      7    When implementing DDC in the driver one has the choice between
      8    DDC1 and DDC2. 
      9    DDC1 data is continuously transmitted by a DDC1 capable display 
     10    device. The data is send serially over a data line; the Vsync 
     11    signal serves as clock. Only one EDID 1.x data block can be 
     12    transmitted using DDC1. Since transmission of an EDID1 block 
     13    using a regular Vsync frequency would take up several seconds 
     14    the driver can increase the Vsync frequency to up to 25 kHz as 
     15    soon as it detects DDC1 activity on the data line.
     16    DDC2 data is transmitted using the I2C protocol. This requires
     17    an additional clock line. DDC2 is capable of transmitting EDID1
     18    and EDID2 block as well as a VDIF block on display devices that 
     19    support these.  
     20    Display devices switch into the DDC2 mode as soon as they detect
     21    activity on the DDC clock line. Once the are in DDC2 mode they
     22    stop transmitting DDC1 signals until the next power cycle.
     23 
     24    Some graphics chipset configurations which are not capable of
     25    DDC2 might still be able to read DDC1 data. Where available
     26    DDC2 it is preferable. 
     27 	
     28    All relevant prototypes and defines are in xf86DDC.h.
     29    DDC2 additionally requires I2C support. The I2C prototypes
     30    are in xf86i2c.h.
     31 
     32    DDC1 Support:
     33 
     34      The driver has to provide a read function which waits for the
     35      end of the next Vsync signal and reads in and returns the status
     36      of the DDC line:
     37 
     38      unsigned int XXX_ddc1Read(ScrnInfoPtr pScrn)
     39      
     40      Additionally a function is required to increase the Vsync
     41      frequency to max. 25 kHz. 
     42  
     43      void XXX_ddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed)
     44  
     45      If the speed argument is DDC_FAST the function should increase
     46      the Vsync frequency on DDC_SLOW it should restore the original
     47      value. For convenience a generic ddc1SetSpeed() function is provided
     48      in the vga module for VGA-like chipsets.     
     49 	
     50      void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, sf86ddcSpeed speed).
     51 
     52      To read out the DDC1 data the driver should call 
     53 
     54      xf86MonPtr xf86DoEDID_DDC1(int scrnIndex, 
     55                               void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed),
     56                               unsigned int (*DDC1Read)(ScrnInfoPtr))
     57  
     58      in PreInit(). DDC1SetSpeed is a pointer to the SetSpeed()
     59      function, DDC1Read has to point to the DDC1 read function.
     60      The function will return a pointer to the xf86Monitor structure
     61      which contains all information retrieved by DDC.
     62      NULL will be returned on failure.
     63 
     64    DDC2 Support
     65  
     66      To read out DDC2 information I2C has to be initialized first.
     67      (See documentation for the i2c module). 
     68      The function 
     69      
     70      xf86MonPtr xf86DoEDID_DDC2(int scrnIndex, I2CBusPtr pBus)
     71 
     72      is provided to read out and process DDC2 data. A pointer
     73      to the I2CBusRec of the appropriate I2C Bus has to be passed
     74      as the second argument.
     75      The function will return a pointer to the xf86Monitor structure
     76      which contains all information retrieved by DDC.
     77      NULL will be returned on failure.
     78 
     79    Printing monitor parameters   
     80 
     81      To print out the information contained in the xf86Monitor
     82      structure the function 
     83 
     84      xf86MonPtr xf86PrintEDID(xf86MonPtr monitor)
     85  
     86      is provided.
     87 
     88     Further processing of the xf86Monitor structure is not yet 
     89     implemented. However, it is planned to use the information
     90     about video modes, gamma values etc.
     91     Therefore it is strongly recommended to read out DDC data
     92     before any video mode processing is done.
     93 
     94 
     95 
     96 
     97 $XFree86: xc/programs/Xserver/hw/xfree86/ddc/DDC.HOWTO,v 1.2 1998/12/06 13:30:39 dawes Exp $