duckstation

duckstation, but archived from the revision just before upstream changed it to a proprietary software project, this version is the libre one
git clone https://git.neptards.moe/u3shit/duckstation.git
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assembler_crypto.cpp (4974B)

      1 #include <biscuit/assert.hpp>
      2 #include <biscuit/assembler.hpp>
      3 
      4 namespace biscuit {
      5 namespace {
      6 void EmitAES32Instruction(CodeBuffer& buffer, uint32_t op, GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
      7     BISCUIT_ASSERT(bs <= 0b11);
      8     buffer.Emit32(op | (bs << 30) | (rs2.Index() << 20) |
      9                   (rs1.Index() << 15) | (rd.Index() << 7));
     10 }
     11 
     12 void EmitSM4Instruction(CodeBuffer& buffer, uint32_t op, GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
     13     // Same behavior, function exists for a better contextual name.
     14     EmitAES32Instruction(buffer, op, rd, rs1, rs2, bs);
     15 }
     16 
     17 void EmitAES64Instruction(CodeBuffer& buffer, uint32_t op, GPR rd, GPR rs1, GPR rs2) noexcept {
     18     buffer.Emit32(op | (rs2.Index() << 20) | (rs1.Index() << 15) | (rd.Index() << 7));
     19 }
     20 
     21 void EmitSHAInstruction(CodeBuffer& buffer, uint32_t op, GPR rd, GPR rs1, GPR rs2) noexcept {
     22     // Same behavior, function exists for a better contextual name.
     23     EmitAES64Instruction(buffer, op, rd, rs1, rs2);
     24 }
     25 
     26 void EmitSM3Instruction(CodeBuffer& buffer, uint32_t op, GPR rd, GPR rs) noexcept {
     27     // Same behavior, function exists for a better contextual name.
     28     EmitAES64Instruction(buffer, op, rd, rs, x0);
     29 }
     30 } // Anonymous namespace
     31 
     32 void Assembler::AES32DSI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
     33     EmitAES32Instruction(m_buffer, 0x2A000033, rd, rs1, rs2, bs);
     34 }
     35 
     36 void Assembler::AES32DSMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
     37     EmitAES32Instruction(m_buffer, 0x2E000033, rd, rs1, rs2, bs);
     38 }
     39 
     40 void Assembler::AES32ESI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
     41     EmitAES32Instruction(m_buffer, 0x22000033, rd, rs1, rs2, bs);
     42 }
     43 
     44 void Assembler::AES32ESMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
     45     EmitAES32Instruction(m_buffer, 0x26000033, rd, rs1, rs2, bs);
     46 }
     47 
     48 void Assembler::AES64DS(GPR rd, GPR rs1, GPR rs2) noexcept {
     49     EmitAES64Instruction(m_buffer, 0x3A000033, rd, rs1, rs2);
     50 }
     51 
     52 void Assembler::AES64DSM(GPR rd, GPR rs1, GPR rs2) noexcept {
     53     EmitAES64Instruction(m_buffer, 0x3E000033, rd, rs1, rs2);
     54 }
     55 
     56 void Assembler::AES64ES(GPR rd, GPR rs1, GPR rs2) noexcept {
     57     EmitAES64Instruction(m_buffer, 0x32000033, rd, rs1, rs2);
     58 }
     59 
     60 void Assembler::AES64ESM(GPR rd, GPR rs1, GPR rs2) noexcept {
     61     EmitAES64Instruction(m_buffer, 0x36000033, rd, rs1, rs2);
     62 }
     63 
     64 void Assembler::AES64IM(GPR rd, GPR rs) noexcept {
     65     EmitAES64Instruction(m_buffer, 0x30001013, rd, rs, x0);
     66 }
     67 
     68 void Assembler::AES64KS1I(GPR rd, GPR rs, uint32_t rnum) noexcept {
     69     // RVK spec states that 0xB to 0xF are reserved.
     70     BISCUIT_ASSERT(rnum <= 0xA);
     71     EmitAES64Instruction(m_buffer, 0x31001013, rd, rs, GPR{rnum});
     72 }
     73 
     74 void Assembler::AES64KS2(GPR rd, GPR rs1, GPR rs2) noexcept {
     75     EmitAES64Instruction(m_buffer, 0x7E000033, rd, rs1, rs2);
     76 }
     77 
     78 void Assembler::SHA256SIG0(GPR rd, GPR rs) noexcept {
     79     EmitSHAInstruction(m_buffer, 0x10201013, rd, rs, x0);
     80 }
     81 
     82 void Assembler::SHA256SIG1(GPR rd, GPR rs) noexcept {
     83     EmitSHAInstruction(m_buffer, 0x10301013, rd, rs, x0);
     84 }
     85 
     86 void Assembler::SHA256SUM0(GPR rd, GPR rs) noexcept {
     87     EmitSHAInstruction(m_buffer, 0x10001013, rd, rs, x0);
     88 }
     89 
     90 void Assembler::SHA256SUM1(GPR rd, GPR rs) noexcept {
     91     EmitSHAInstruction(m_buffer, 0x10101013, rd, rs, x0);
     92 }
     93 
     94 void Assembler::SHA512SIG0(GPR rd, GPR rs) noexcept {
     95     EmitSHAInstruction(m_buffer, 0x10601013, rd, rs, x0);
     96 }
     97 
     98 void Assembler::SHA512SIG0H(GPR rd, GPR rs1, GPR rs2) noexcept {
     99     EmitSHAInstruction(m_buffer, 0x5C000033, rd, rs1, rs2);
    100 }
    101 
    102 void Assembler::SHA512SIG0L(GPR rd, GPR rs1, GPR rs2) noexcept {
    103     EmitSHAInstruction(m_buffer, 0x54000033, rd, rs1, rs2);
    104 }
    105 
    106 void Assembler::SHA512SIG1(GPR rd, GPR rs) noexcept {
    107     EmitSHAInstruction(m_buffer, 0x10701013, rd, rs, x0);
    108 }
    109 
    110 void Assembler::SHA512SIG1H(GPR rd, GPR rs1, GPR rs2) noexcept {
    111     EmitSHAInstruction(m_buffer, 0x5E000033, rd, rs1, rs2);
    112 }
    113 
    114 void Assembler::SHA512SIG1L(GPR rd, GPR rs1, GPR rs2) noexcept {
    115     EmitSHAInstruction(m_buffer, 0x56000033, rd, rs1, rs2);
    116 }
    117 
    118 void Assembler::SHA512SUM0(GPR rd, GPR rs) noexcept {
    119     EmitSHAInstruction(m_buffer, 0x10401013, rd, rs, x0);
    120 }
    121 
    122 void Assembler::SHA512SUM0R(GPR rd, GPR rs1, GPR rs2) noexcept {
    123     EmitSHAInstruction(m_buffer, 0x50000033, rd, rs1, rs2);
    124 }
    125 
    126 void Assembler::SHA512SUM1(GPR rd, GPR rs) noexcept {
    127     EmitSHAInstruction(m_buffer, 0x10501013, rd, rs, x0);
    128 }
    129 
    130 void Assembler::SHA512SUM1R(GPR rd, GPR rs1, GPR rs2) noexcept {
    131     EmitSHAInstruction(m_buffer, 0x52000033, rd, rs1, rs2);
    132 }
    133 
    134 void Assembler::SM3P0(GPR rd, GPR rs) noexcept {
    135     EmitSM3Instruction(m_buffer, 0x10801013, rd, rs);
    136 }
    137 
    138 void Assembler::SM3P1(GPR rd, GPR rs) noexcept {
    139     EmitSM3Instruction(m_buffer, 0x10901013, rd, rs);
    140 }
    141 
    142 void Assembler::SM4ED(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
    143     EmitSM4Instruction(m_buffer, 0x30000033, rd, rs1, rs2, bs);
    144 }
    145 
    146 void Assembler::SM4KS(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept {
    147     EmitSM4Instruction(m_buffer, 0x34000033, rd, rs1, rs2, bs);
    148 }
    149 } // namespace biscuit