assembler.hpp (62323B)
1 #pragma once 2 3 #include <biscuit/code_buffer.hpp> 4 #include <biscuit/csr.hpp> 5 #include <biscuit/isa.hpp> 6 #include <biscuit/label.hpp> 7 #include <biscuit/registers.hpp> 8 #include <biscuit/vector.hpp> 9 #include <cstddef> 10 #include <cstdint> 11 12 namespace biscuit { 13 14 /** 15 * Code generator for RISC-V code. 16 * 17 * User code may inherit from this in order to make use of 18 * the API more convenient, or use it separately if desired. 19 */ 20 class Assembler { 21 public: 22 /** 23 * Constructor 24 * 25 * Initializes the underlying code buffer to be able to hold `capacity` bytes. 26 * 27 * @param capacity The capacity for the underlying code buffer in bytes. 28 * If no capacity is specified, then the underlying buffer 29 * will be 4KB in size. 30 */ 31 [[nodiscard]] explicit Assembler(size_t capacity = CodeBuffer::default_capacity); 32 33 /** 34 * Constructor 35 * 36 * @param buffer A non-null pointer to an allocated buffer of size `capacity`. 37 * @param capacity The capacity of the memory pointed to by `buffer`. 38 * 39 * @pre The given memory buffer must not be null. 40 * @pre The given memory buffer must be at minimum `capacity` bytes in size. 41 * 42 * @note The caller is responsible for managing the lifetime of the given memory. 43 * CodeBuffer will *not* free the memory once it goes out of scope. 44 */ 45 [[nodiscard]] explicit Assembler(uint8_t* buffer, size_t capacity); 46 47 // Copy constructor and assignment. 48 Assembler(const Assembler&) = delete; 49 Assembler& operator=(const Assembler&) = delete; 50 51 // Move constructor and assignment. 52 Assembler(Assembler&&) = default; 53 Assembler& operator=(Assembler&&) = default; 54 55 // Destructor 56 virtual ~Assembler(); 57 58 /// Gets the underlying code buffer being managed by this assembler. 59 CodeBuffer& GetCodeBuffer(); 60 61 /** 62 * Allows swapping out the code buffer used by the assembler. 63 * 64 * @param buffer The new buffer for the assembler to emit code into. 65 * 66 * @returns The old buffer that the assembler made use of. 67 */ 68 CodeBuffer SwapCodeBuffer(CodeBuffer&& buffer) noexcept; 69 70 /** 71 * Allows rewinding of the code buffer cursor. 72 * 73 * @param offset The offset to rewind the cursor by. 74 * 75 * @note If no offset is provided, then this function rewinds the 76 * cursor to the beginning of the buffer. 77 * 78 * @note The offset may not be larger than the current cursor offset 79 * and may not be less than the current buffer starting address. 80 */ 81 void RewindBuffer(ptrdiff_t offset = 0) { 82 m_buffer.RewindCursor(offset); 83 } 84 85 /// Retrieves the cursor pointer for the underlying code buffer. 86 [[nodiscard]] uint8_t* GetCursorPointer() noexcept { 87 return m_buffer.GetCursorPointer(); 88 } 89 90 /// Retrieves the cursor for the underlying code buffer. 91 [[nodiscard]] const uint8_t* GetCursorPointer() const noexcept { 92 return m_buffer.GetCursorPointer(); 93 } 94 95 /// Retrieves the pointer to an arbitrary location within the underlying code buffer. 96 [[nodiscard]] uint8_t* GetBufferPointer(ptrdiff_t offset) noexcept { 97 return m_buffer.GetOffsetPointer(offset); 98 } 99 100 /// Retrieves the pointer to an arbitrary location within the underlying code buffer. 101 [[nodiscard]] const uint8_t* GetBufferPointer(ptrdiff_t offset) const noexcept { 102 return m_buffer.GetOffsetPointer(offset); 103 } 104 105 /** 106 * Binds a label to the current offset within the code buffer 107 * 108 * @param label A non-null valid label to bind. 109 */ 110 void Bind(Label* label); 111 112 // RV32I Instructions 113 114 void ADD(GPR rd, GPR lhs, GPR rhs) noexcept; 115 void ADDI(GPR rd, GPR rs, int32_t imm) noexcept; 116 void AND(GPR rd, GPR lhs, GPR rhs) noexcept; 117 void ANDI(GPR rd, GPR rs, uint32_t imm) noexcept; 118 119 void AUIPC(GPR rd, int32_t imm) noexcept; 120 121 void BEQ(GPR rs1, GPR rs2, Label* label) noexcept; 122 void BEQZ(GPR rs, Label* label) noexcept; 123 void BGE(GPR rs1, GPR rs2, Label* label) noexcept; 124 void BGEU(GPR rs1, GPR rs2, Label* label) noexcept; 125 void BGEZ(GPR rs, Label* label) noexcept; 126 void BGT(GPR rs, GPR rt, Label* label) noexcept; 127 void BGTU(GPR rs, GPR rt, Label* label) noexcept; 128 void BGTZ(GPR rs, Label* label) noexcept; 129 void BLE(GPR rs, GPR rt, Label* label) noexcept; 130 void BLEU(GPR rs, GPR rt, Label* label) noexcept; 131 void BLEZ(GPR rs, Label* label) noexcept; 132 void BLT(GPR rs1, GPR rs2, Label* label) noexcept; 133 void BLTU(GPR rs1, GPR rs2, Label* label) noexcept; 134 void BLTZ(GPR rs, Label* label) noexcept; 135 void BNE(GPR rs1, GPR rs2, Label* label) noexcept; 136 void BNEZ(GPR rs, Label* label) noexcept; 137 138 void BEQ(GPR rs1, GPR rs2, int32_t imm) noexcept; 139 void BEQZ(GPR rs, int32_t imm) noexcept; 140 void BGE(GPR rs1, GPR rs2, int32_t imm) noexcept; 141 void BGEU(GPR rs1, GPR rs2, int32_t imm) noexcept; 142 void BGEZ(GPR rs, int32_t imm) noexcept; 143 void BGT(GPR rs, GPR rt, int32_t imm) noexcept; 144 void BGTU(GPR rs, GPR rt, int32_t imm) noexcept; 145 void BGTZ(GPR rs, int32_t imm) noexcept; 146 void BLE(GPR rs, GPR rt, int32_t imm) noexcept; 147 void BLEU(GPR rs, GPR rt, int32_t imm) noexcept; 148 void BLEZ(GPR rs, int32_t imm) noexcept; 149 void BLT(GPR rs1, GPR rs2, int32_t imm) noexcept; 150 void BLTU(GPR rs1, GPR rs2, int32_t imm) noexcept; 151 void BLTZ(GPR rs, int32_t imm) noexcept; 152 void BNE(GPR rs1, GPR rs2, int32_t imm) noexcept; 153 void BNEZ(GPR rs, int32_t imm) noexcept; 154 155 void CALL(int32_t offset) noexcept; 156 157 void EBREAK() noexcept; 158 void ECALL() noexcept; 159 160 void FENCE() noexcept; 161 void FENCE(FenceOrder pred, FenceOrder succ) noexcept; 162 void FENCEI(GPR rd = x0, GPR rs = x0, uint32_t imm = 0) noexcept; 163 void FENCETSO() noexcept; 164 165 void J(Label* label) noexcept; 166 void JAL(Label* label) noexcept; 167 void JAL(GPR rd, Label* label) noexcept; 168 169 void J(int32_t imm) noexcept; 170 void JAL(int32_t imm) noexcept; 171 void JAL(GPR rd, int32_t imm) noexcept; 172 void JALR(GPR rs) noexcept; 173 void JALR(GPR rd, int32_t imm, GPR rs1) noexcept; 174 void JR(GPR rs) noexcept; 175 176 void LB(GPR rd, int32_t imm, GPR rs) noexcept; 177 void LBU(GPR rd, int32_t imm, GPR rs) noexcept; 178 void LH(GPR rd, int32_t imm, GPR rs) noexcept; 179 void LHU(GPR rd, int32_t imm, GPR rs) noexcept; 180 void LI(GPR rd, uint32_t imm) noexcept; 181 void LUI(GPR rd, uint32_t imm) noexcept; 182 void LW(GPR rd, int32_t imm, GPR rs) noexcept; 183 184 void MV(GPR rd, GPR rs) noexcept; 185 void NEG(GPR rd, GPR rs) noexcept; 186 187 void NOP() noexcept; 188 189 void NOT(GPR rd, GPR rs) noexcept; 190 void OR(GPR rd, GPR lhs, GPR rhs) noexcept; 191 void ORI(GPR rd, GPR rs, uint32_t imm) noexcept; 192 193 void PAUSE() noexcept; 194 void RET() noexcept; 195 196 void SB(GPR rs2, int32_t imm, GPR rs1) noexcept; 197 void SH(GPR rs2, int32_t imm, GPR rs1) noexcept; 198 void SW(GPR rs2, int32_t imm, GPR rs1) noexcept; 199 200 void SEQZ(GPR rd, GPR rs) noexcept; 201 void SGTZ(GPR rd, GPR rs) noexcept; 202 203 void SLL(GPR rd, GPR lhs, GPR rhs) noexcept; 204 void SLLI(GPR rd, GPR rs, uint32_t shift) noexcept; 205 206 void SLT(GPR rd, GPR lhs, GPR rhs) noexcept; 207 void SLTI(GPR rd, GPR rs, int32_t imm) noexcept; 208 void SLTIU(GPR rd, GPR rs, int32_t imm) noexcept; 209 void SLTU(GPR rd, GPR lhs, GPR rhs) noexcept; 210 void SLTZ(GPR rd, GPR rs) noexcept; 211 212 void SNEZ(GPR rd, GPR rs) noexcept; 213 214 void SRA(GPR rd, GPR lhs, GPR rhs) noexcept; 215 void SRAI(GPR rd, GPR rs, uint32_t shift) noexcept; 216 217 void SRL(GPR rd, GPR lhs, GPR rhs) noexcept; 218 void SRLI(GPR rd, GPR rs, uint32_t shift) noexcept; 219 220 void SUB(GPR rd, GPR lhs, GPR rhs) noexcept; 221 222 void XOR(GPR rd, GPR lhs, GPR rhs) noexcept; 223 void XORI(GPR rd, GPR rs, uint32_t imm) noexcept; 224 225 // RV64I Base Instruction Set 226 227 void ADDIW(GPR rd, GPR rs, int32_t imm) noexcept; 228 void ADDW(GPR rd, GPR lhs, GPR rhs) noexcept; 229 void LD(GPR rd, int32_t imm, GPR rs) noexcept; 230 void LWU(GPR rd, int32_t imm, GPR rs) noexcept; 231 void SD(GPR rs2, int32_t imm, GPR rs1) noexcept; 232 233 // NOTE: Perhaps we should coalesce this into the 32-bit variant? 234 // Keeping them separated allows asserts for catching 235 // out of range shifts. 236 void SRAI64(GPR rd, GPR rs, uint32_t shift) noexcept; 237 void SLLI64(GPR rd, GPR rs, uint32_t shift) noexcept; 238 void SRLI64(GPR rd, GPR rs, uint32_t shift) noexcept; 239 240 void SLLIW(GPR rd, GPR rs, uint32_t shift) noexcept; 241 void SRAIW(GPR rd, GPR rs, uint32_t shift) noexcept; 242 void SRLIW(GPR rd, GPR rs, uint32_t shift) noexcept; 243 244 void SLLW(GPR rd, GPR lhs, GPR rhs) noexcept; 245 void SRAW(GPR rd, GPR lhs, GPR rhs) noexcept; 246 void SRLW(GPR rd, GPR lhs, GPR rhs) noexcept; 247 void SUBW(GPR rd, GPR lhs, GPR rhs) noexcept; 248 249 // Zicsr Extension Instructions 250 251 void CSRRC(GPR rd, CSR csr, GPR rs) noexcept; 252 void CSRRCI(GPR rd, CSR csr, uint32_t imm) noexcept; 253 void CSRRS(GPR rd, CSR csr, GPR rs) noexcept; 254 void CSRRSI(GPR rd, CSR csr, uint32_t imm) noexcept; 255 void CSRRW(GPR rd, CSR csr, GPR rs) noexcept; 256 void CSRRWI(GPR rd, CSR csr, uint32_t imm) noexcept; 257 258 void CSRR(GPR rd, CSR csr) noexcept; 259 void CSWR(CSR csr, GPR rs) noexcept; 260 261 void CSRS(CSR csr, GPR rs) noexcept; 262 void CSRC(CSR csr, GPR rs) noexcept; 263 264 void CSRCI(CSR csr, uint32_t imm) noexcept; 265 void CSRSI(CSR csr, uint32_t imm) noexcept; 266 void CSRWI(CSR csr, uint32_t imm) noexcept; 267 268 void FRCSR(GPR rd) noexcept; 269 void FSCSR(GPR rd, GPR rs) noexcept; 270 void FSCSR(GPR rs) noexcept; 271 272 void FRRM(GPR rd) noexcept; 273 void FSRM(GPR rd, GPR rs) noexcept; 274 void FSRM(GPR rs) noexcept; 275 276 void FSRMI(GPR rd, uint32_t imm) noexcept; 277 void FSRMI(uint32_t imm) noexcept; 278 279 void FRFLAGS(GPR rd) noexcept; 280 void FSFLAGS(GPR rd, GPR rs) noexcept; 281 void FSFLAGS(GPR rs) noexcept; 282 283 void FSFLAGSI(GPR rd, uint32_t imm) noexcept; 284 void FSFLAGSI(uint32_t imm) noexcept; 285 286 void RDCYCLE(GPR rd) noexcept; 287 void RDCYCLEH(GPR rd) noexcept; 288 289 void RDINSTRET(GPR rd) noexcept; 290 void RDINSTRETH(GPR rd) noexcept; 291 292 void RDTIME(GPR rd) noexcept; 293 void RDTIMEH(GPR rd) noexcept; 294 295 // Zihintntl Extension Instructions 296 297 void C_NTL_ALL() noexcept; 298 void C_NTL_S1() noexcept; 299 void C_NTL_P1() noexcept; 300 void C_NTL_PALL() noexcept; 301 void NTL_ALL() noexcept; 302 void NTL_S1() noexcept; 303 void NTL_P1() noexcept; 304 void NTL_PALL() noexcept; 305 306 // RV32M Extension Instructions 307 308 void DIV(GPR rd, GPR rs1, GPR rs2) noexcept; 309 void DIVU(GPR rd, GPR rs1, GPR rs2) noexcept; 310 void MUL(GPR rd, GPR rs1, GPR rs2) noexcept; 311 void MULH(GPR rd, GPR rs1, GPR rs2) noexcept; 312 void MULHSU(GPR rd, GPR rs1, GPR rs2) noexcept; 313 void MULHU(GPR rd, GPR rs1, GPR rs2) noexcept; 314 void REM(GPR rd, GPR rs1, GPR rs2) noexcept; 315 void REMU(GPR rd, GPR rs1, GPR rs2) noexcept; 316 317 // RV64M Extension Instructions 318 319 void DIVW(GPR rd, GPR rs1, GPR rs2) noexcept; 320 void DIVUW(GPR rd, GPR rs1, GPR rs2) noexcept; 321 void MULW(GPR rd, GPR rs1, GPR rs2) noexcept; 322 void REMW(GPR rd, GPR rs1, GPR rs2) noexcept; 323 void REMUW(GPR rd, GPR rs1, GPR rs2) noexcept; 324 325 // RV32A Extension Instructions 326 327 void AMOADD_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 328 void AMOAND_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 329 void AMOMAX_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 330 void AMOMAXU_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 331 void AMOMIN_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 332 void AMOMINU_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 333 void AMOOR_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 334 void AMOSWAP_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 335 void AMOXOR_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 336 void LR_W(Ordering ordering, GPR rd, GPR rs) noexcept; 337 void SC_W(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 338 339 // RV64A Extension Instructions 340 341 void AMOADD_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 342 void AMOAND_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 343 void AMOMAX_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 344 void AMOMAXU_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 345 void AMOMIN_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 346 void AMOMINU_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 347 void AMOOR_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 348 void AMOSWAP_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 349 void AMOXOR_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 350 void LR_D(Ordering ordering, GPR rd, GPR rs) noexcept; 351 void SC_D(Ordering ordering, GPR rd, GPR rs2, GPR rs1) noexcept; 352 353 // RV32F Extension Instructions 354 355 void FADD_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 356 void FCLASS_S(GPR rd, FPR rs1) noexcept; 357 void FCVT_S_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 358 void FCVT_S_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 359 void FCVT_W_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 360 void FCVT_WU_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 361 void FDIV_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 362 void FEQ_S(GPR rd, FPR rs1, FPR rs2) noexcept; 363 void FLE_S(GPR rd, FPR rs1, FPR rs2) noexcept; 364 void FLT_S(GPR rd, FPR rs1, FPR rs2) noexcept; 365 void FLW(FPR rd, int32_t offset, GPR rs) noexcept; 366 void FMADD_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 367 void FMAX_S(FPR rd, FPR rs1, FPR rs2) noexcept; 368 void FMIN_S(FPR rd, FPR rs1, FPR rs2) noexcept; 369 void FMSUB_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 370 void FMUL_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 371 void FMV_W_X(FPR rd, GPR rs1) noexcept; 372 void FMV_X_W(GPR rd, FPR rs1) noexcept; 373 void FNMADD_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 374 void FNMSUB_S(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 375 void FSGNJ_S(FPR rd, FPR rs1, FPR rs2) noexcept; 376 void FSGNJN_S(FPR rd, FPR rs1, FPR rs2) noexcept; 377 void FSGNJX_S(FPR rd, FPR rs1, FPR rs2) noexcept; 378 void FSQRT_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 379 void FSUB_S(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 380 void FSW(FPR rs2, int32_t offset, GPR rs1) noexcept; 381 382 void FABS_S(FPR rd, FPR rs) noexcept; 383 void FMV_S(FPR rd, FPR rs) noexcept; 384 void FNEG_S(FPR rd, FPR rs) noexcept; 385 386 // RV64F Extension Instructions 387 388 void FCVT_L_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 389 void FCVT_LU_S(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 390 void FCVT_S_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 391 void FCVT_S_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 392 393 // RV32D Extension Instructions 394 395 void FADD_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 396 void FCLASS_D(GPR rd, FPR rs1) noexcept; 397 void FCVT_D_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 398 void FCVT_D_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 399 void FCVT_W_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 400 void FCVT_WU_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 401 void FCVT_D_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 402 void FCVT_S_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 403 void FDIV_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 404 void FEQ_D(GPR rd, FPR rs1, FPR rs2) noexcept; 405 void FLE_D(GPR rd, FPR rs1, FPR rs2) noexcept; 406 void FLT_D(GPR rd, FPR rs1, FPR rs2) noexcept; 407 void FLD(FPR rd, int32_t offset, GPR rs) noexcept; 408 void FMADD_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 409 void FMAX_D(FPR rd, FPR rs1, FPR rs2) noexcept; 410 void FMIN_D(FPR rd, FPR rs1, FPR rs2) noexcept; 411 void FMSUB_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 412 void FMUL_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 413 void FNMADD_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 414 void FNMSUB_D(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 415 void FSGNJ_D(FPR rd, FPR rs1, FPR rs2) noexcept; 416 void FSGNJN_D(FPR rd, FPR rs1, FPR rs2) noexcept; 417 void FSGNJX_D(FPR rd, FPR rs1, FPR rs2) noexcept; 418 void FSQRT_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 419 void FSUB_D(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 420 void FSD(FPR rs2, int32_t offset, GPR rs1) noexcept; 421 422 void FABS_D(FPR rd, FPR rs) noexcept; 423 void FMV_D(FPR rd, FPR rs) noexcept; 424 void FNEG_D(FPR rd, FPR rs) noexcept; 425 426 // RV64D Extension Instructions 427 428 void FCVT_L_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 429 void FCVT_LU_D(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 430 void FCVT_D_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 431 void FCVT_D_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 432 void FMV_D_X(FPR rd, GPR rs1) noexcept; 433 void FMV_X_D(GPR rd, FPR rs1) noexcept; 434 435 // RV32Q Extension Instructions 436 437 void FADD_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 438 void FCLASS_Q(GPR rd, FPR rs1) noexcept; 439 void FCVT_Q_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 440 void FCVT_Q_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 441 void FCVT_W_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 442 void FCVT_WU_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 443 void FCVT_Q_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 444 void FCVT_D_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 445 void FCVT_Q_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 446 void FCVT_S_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 447 void FDIV_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 448 void FEQ_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 449 void FLE_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 450 void FLT_Q(GPR rd, FPR rs1, FPR rs2) noexcept; 451 void FLQ(FPR rd, int32_t offset, GPR rs) noexcept; 452 void FMADD_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 453 void FMAX_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 454 void FMIN_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 455 void FMSUB_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 456 void FMUL_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 457 void FNMADD_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 458 void FNMSUB_Q(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 459 void FSGNJ_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 460 void FSGNJN_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 461 void FSGNJX_Q(FPR rd, FPR rs1, FPR rs2) noexcept; 462 void FSQRT_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 463 void FSUB_Q(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 464 void FSQ(FPR rs2, int32_t offset, GPR rs1) noexcept; 465 466 void FABS_Q(FPR rd, FPR rs) noexcept; 467 void FMV_Q(FPR rd, FPR rs) noexcept; 468 void FNEG_Q(FPR rd, FPR rs) noexcept; 469 470 // RV64Q Extension Instructions 471 472 void FCVT_L_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 473 void FCVT_LU_Q(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 474 void FCVT_Q_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 475 void FCVT_Q_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 476 477 // RV32Zfh Extension Instructions 478 479 void FADD_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 480 void FCLASS_H(GPR rd, FPR rs1) noexcept; 481 void FCVT_D_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 482 void FCVT_H_D(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 483 void FCVT_H_Q(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 484 void FCVT_H_S(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 485 void FCVT_H_W(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 486 void FCVT_H_WU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 487 void FCVT_Q_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 488 void FCVT_S_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 489 void FCVT_W_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 490 void FCVT_WU_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 491 void FDIV_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 492 void FEQ_H(GPR rd, FPR rs1, FPR rs2) noexcept; 493 void FLE_H(GPR rd, FPR rs1, FPR rs2) noexcept; 494 void FLH(FPR rd, int32_t offset, GPR rs) noexcept; 495 void FLT_H(GPR rd, FPR rs1, FPR rs2) noexcept; 496 void FMADD_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 497 void FMAX_H(FPR rd, FPR rs1, FPR rs2) noexcept; 498 void FMIN_H(FPR rd, FPR rs1, FPR rs2) noexcept; 499 void FMSUB_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 500 void FMUL_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 501 void FMV_H_X(FPR rd, GPR rs1) noexcept; 502 void FMV_X_H(GPR rd, FPR rs1) noexcept; 503 void FNMADD_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 504 void FNMSUB_H(FPR rd, FPR rs1, FPR rs2, FPR rs3, RMode rmode = RMode::DYN) noexcept; 505 void FSGNJ_H(FPR rd, FPR rs1, FPR rs2) noexcept; 506 void FSGNJN_H(FPR rd, FPR rs1, FPR rs2) noexcept; 507 void FSGNJX_H(FPR rd, FPR rs1, FPR rs2) noexcept; 508 void FSH(FPR rs2, int32_t offset, GPR rs1) noexcept; 509 void FSQRT_H(FPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 510 void FSUB_H(FPR rd, FPR rs1, FPR rs2, RMode rmode = RMode::DYN) noexcept; 511 512 // RV64Zfh Extension Instructions 513 514 void FCVT_L_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 515 void FCVT_LU_H(GPR rd, FPR rs1, RMode rmode = RMode::DYN) noexcept; 516 void FCVT_H_L(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 517 void FCVT_H_LU(FPR rd, GPR rs1, RMode rmode = RMode::DYN) noexcept; 518 519 // RVB Extension Instructions 520 521 void ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 522 void ANDN(GPR rd, GPR rs1, GPR rs2) noexcept; 523 void BCLR(GPR rd, GPR rs1, GPR rs2) noexcept; 524 void BCLRI(GPR rd, GPR rs, uint32_t bit) noexcept; 525 void BEXT(GPR rd, GPR rs1, GPR rs2) noexcept; 526 void BEXTI(GPR rd, GPR rs, uint32_t bit) noexcept; 527 void BINV(GPR rd, GPR rs1, GPR rs2) noexcept; 528 void BINVI(GPR rd, GPR rs, uint32_t bit) noexcept; 529 void BSET(GPR rd, GPR rs1, GPR rs2) noexcept; 530 void BSETI(GPR rd, GPR rs, uint32_t bit) noexcept; 531 void CLMUL(GPR rd, GPR rs1, GPR rs2) noexcept; 532 void CLMULH(GPR rd, GPR rs1, GPR rs2) noexcept; 533 void CLMULR(GPR rd, GPR rs1, GPR rs2) noexcept; 534 void CLZ(GPR rd, GPR rs) noexcept; 535 void CLZW(GPR rd, GPR rs) noexcept; 536 void CPOP(GPR rd, GPR rs) noexcept; 537 void CPOPW(GPR rd, GPR rs) noexcept; 538 void CTZ(GPR rd, GPR rs) noexcept; 539 void CTZW(GPR rd, GPR rs) noexcept; 540 void MAX(GPR rd, GPR rs1, GPR rs2) noexcept; 541 void MAXU(GPR rd, GPR rs1, GPR rs2) noexcept; 542 void MIN(GPR rd, GPR rs1, GPR rs2) noexcept; 543 void MINU(GPR rd, GPR rs1, GPR rs2) noexcept; 544 void ORCB(GPR rd, GPR rs) noexcept; 545 void ORN(GPR rd, GPR rs1, GPR rs2) noexcept; 546 void PACK(GPR rd, GPR rs1, GPR rs2) noexcept; 547 void PACKH(GPR rd, GPR rs1, GPR rs2) noexcept; 548 void PACKW(GPR rd, GPR rs1, GPR rs2) noexcept; 549 void REV8_32(GPR rd, GPR rs) noexcept; 550 void REV8_64(GPR rd, GPR rs) noexcept; 551 void REV_B(GPR rd, GPR rs) noexcept; 552 void ROL(GPR rd, GPR rs1, GPR rs2) noexcept; 553 void ROLW(GPR rd, GPR rs1, GPR rs2) noexcept; 554 void ROR(GPR rd, GPR rs1, GPR rs2) noexcept; 555 void RORI(GPR rd, GPR rs, uint32_t rotate_amount) noexcept; 556 void RORIW(GPR rd, GPR rs, uint32_t rotate_amount) noexcept; 557 void RORW(GPR rd, GPR rs1, GPR rs2) noexcept; 558 void SEXTB(GPR rd, GPR rs) noexcept; 559 void SEXTH(GPR rd, GPR rs) noexcept; 560 void SH1ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 561 void SH1ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 562 void SH2ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 563 void SH2ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 564 void SH3ADD(GPR rd, GPR rs1, GPR rs2) noexcept; 565 void SH3ADDUW(GPR rd, GPR rs1, GPR rs2) noexcept; 566 void SLLIUW(GPR rd, GPR rs, uint32_t shift_amount) noexcept; 567 void UNZIP(GPR rd, GPR rs) noexcept; 568 void XNOR(GPR rd, GPR rs1, GPR rs2) noexcept; 569 void XPERMB(GPR rd, GPR rs1, GPR rs2) noexcept; 570 void XPERMN(GPR rd, GPR rs1, GPR rs2) noexcept; 571 void ZEXTH_32(GPR rd, GPR rs) noexcept; 572 void ZEXTH_64(GPR rd, GPR rs) noexcept; 573 void ZEXTW(GPR rd, GPR rs) noexcept; 574 void ZIP(GPR rd, GPR rs) noexcept; 575 576 // Scalar Cryptography (RVK) instructions 577 578 void AES32DSI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 579 void AES32DSMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 580 void AES32ESI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 581 void AES32ESMI(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 582 void AES64DS(GPR rd, GPR rs1, GPR rs2) noexcept; 583 void AES64DSM(GPR rd, GPR rs1, GPR rs2) noexcept; 584 void AES64ES(GPR rd, GPR rs1, GPR rs2) noexcept; 585 void AES64ESM(GPR rd, GPR rs1, GPR rs2) noexcept; 586 void AES64IM(GPR rd, GPR rs) noexcept; 587 void AES64KS1I(GPR rd, GPR rs, uint32_t rnum) noexcept; 588 void AES64KS2(GPR rd, GPR rs1, GPR rs2) noexcept; 589 void SHA256SIG0(GPR rd, GPR rs) noexcept; 590 void SHA256SIG1(GPR rd, GPR rs) noexcept; 591 void SHA256SUM0(GPR rd, GPR rs) noexcept; 592 void SHA256SUM1(GPR rd, GPR rs) noexcept; 593 void SHA512SIG0(GPR rd, GPR rs) noexcept; 594 void SHA512SIG0H(GPR rd, GPR rs1, GPR rs2) noexcept; 595 void SHA512SIG0L(GPR rd, GPR rs1, GPR rs2) noexcept; 596 void SHA512SIG1(GPR rd, GPR rs) noexcept; 597 void SHA512SIG1H(GPR rd, GPR rs1, GPR rs2) noexcept; 598 void SHA512SIG1L(GPR rd, GPR rs1, GPR rs2) noexcept; 599 void SHA512SUM0(GPR rd, GPR rs) noexcept; 600 void SHA512SUM0R(GPR rd, GPR rs1, GPR rs2) noexcept; 601 void SHA512SUM1(GPR rd, GPR rs) noexcept; 602 void SHA512SUM1R(GPR rd, GPR rs1, GPR rs2) noexcept; 603 void SM3P0(GPR rd, GPR rs) noexcept; 604 void SM3P1(GPR rd, GPR rs) noexcept; 605 void SM4ED(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 606 void SM4KS(GPR rd, GPR rs1, GPR rs2, uint32_t bs) noexcept; 607 608 // RVC Extension Instructions 609 610 void C_ADD(GPR rd, GPR rs) noexcept; 611 void C_ADDI(GPR rd, int32_t imm) noexcept; 612 void C_ADDIW(GPR rd, int32_t imm) noexcept; 613 void C_ADDI4SPN(GPR rd, uint32_t imm) noexcept; 614 void C_ADDI16SP(int32_t imm) noexcept; 615 void C_ADDW(GPR rd, GPR rs) noexcept; 616 void C_AND(GPR rd, GPR rs) noexcept; 617 void C_ANDI(GPR rd, uint32_t imm) noexcept; 618 void C_BEQZ(GPR rs, int32_t offset) noexcept; 619 void C_BEQZ(GPR rs, Label* label) noexcept; 620 void C_BNEZ(GPR rs, int32_t offset) noexcept; 621 void C_BNEZ(GPR rs, Label* label) noexcept; 622 void C_EBREAK() noexcept; 623 void C_FLD(FPR rd, uint32_t imm, GPR rs) noexcept; 624 void C_FLDSP(FPR rd, uint32_t imm) noexcept; 625 void C_FLW(FPR rd, uint32_t imm, GPR rs) noexcept; 626 void C_FLWSP(FPR rd, uint32_t imm) noexcept; 627 void C_FSD(FPR rs2, uint32_t imm, GPR rs1) noexcept; 628 void C_FSDSP(FPR rs, uint32_t imm) noexcept; 629 void C_FSW(FPR rs2, uint32_t imm, GPR rs1) noexcept; 630 void C_FSWSP(FPR rs, uint32_t imm) noexcept; 631 void C_J(int32_t offset) noexcept; 632 void C_J(Label* label) noexcept; 633 void C_JAL(Label* label) noexcept; 634 void C_JAL(int32_t offset) noexcept; 635 void C_JALR(GPR rs) noexcept; 636 void C_JR(GPR rs) noexcept; 637 void C_LD(GPR rd, uint32_t imm, GPR rs) noexcept; 638 void C_LDSP(GPR rd, uint32_t imm) noexcept; 639 void C_LI(GPR rd, int32_t imm) noexcept; 640 void C_LQ(GPR rd, uint32_t imm, GPR rs) noexcept; 641 void C_LQSP(GPR rd, uint32_t imm) noexcept; 642 void C_LUI(GPR rd, uint32_t imm) noexcept; 643 void C_LW(GPR rd, uint32_t imm, GPR rs) noexcept; 644 void C_LWSP(GPR rd, uint32_t imm) noexcept; 645 void C_MV(GPR rd, GPR rs) noexcept; 646 void C_NOP() noexcept; 647 void C_OR(GPR rd, GPR rs) noexcept; 648 void C_SD(GPR rs2, uint32_t imm, GPR rs1) noexcept; 649 void C_SDSP(GPR rs, uint32_t imm) noexcept; 650 void C_SLLI(GPR rd, uint32_t shift) noexcept; 651 void C_SQ(GPR rs2, uint32_t imm, GPR rs1) noexcept; 652 void C_SQSP(GPR rs, uint32_t imm) noexcept; 653 void C_SRAI(GPR rd, uint32_t shift) noexcept; 654 void C_SRLI(GPR rd, uint32_t shift) noexcept; 655 void C_SUB(GPR rd, GPR rs) noexcept; 656 void C_SUBW(GPR rd, GPR rs) noexcept; 657 void C_SW(GPR rs2, uint32_t imm, GPR rs1) noexcept; 658 void C_SWSP(GPR rs, uint32_t imm) noexcept; 659 void C_UNDEF() noexcept; 660 void C_XOR(GPR rd, GPR rs) noexcept; 661 662 // Cache Management Operation Extension Instructions 663 664 void CBO_CLEAN(GPR rs) noexcept; 665 void CBO_FLUSH(GPR rs) noexcept; 666 void CBO_INVAL(GPR rs) noexcept; 667 void CBO_ZERO(GPR rs) noexcept; 668 void PREFETCH_I(GPR rs, int32_t offset = 0) noexcept; 669 void PREFETCH_R(GPR rs, int32_t offset = 0) noexcept; 670 void PREFETCH_W(GPR rs, int32_t offset = 0) noexcept; 671 672 // Privileged Instructions 673 674 void HFENCE_GVMA(GPR rs1, GPR rs2) noexcept; 675 void HFENCE_VVMA(GPR rs1, GPR rs2) noexcept; 676 void HINVAL_GVMA(GPR rs1, GPR rs2) noexcept; 677 void HINVAL_VVMA(GPR rs1, GPR rs2) noexcept; 678 void HLV_B(GPR rd, GPR rs) noexcept; 679 void HLV_BU(GPR rd, GPR rs) noexcept; 680 void HLV_D(GPR rd, GPR rs) noexcept; 681 void HLV_H(GPR rd, GPR rs) noexcept; 682 void HLV_HU(GPR rd, GPR rs) noexcept; 683 void HLV_W(GPR rd, GPR rs) noexcept; 684 void HLV_WU(GPR rd, GPR rs) noexcept; 685 void HLVX_HU(GPR rd, GPR rs) noexcept; 686 void HLVX_WU(GPR rd, GPR rs) noexcept; 687 void HSV_B(GPR rs2, GPR rs1) noexcept; 688 void HSV_D(GPR rs2, GPR rs1) noexcept; 689 void HSV_H(GPR rs2, GPR rs1) noexcept; 690 void HSV_W(GPR rs2, GPR rs1) noexcept; 691 void MRET() noexcept; 692 void SFENCE_INVAL_IR() noexcept; 693 void SFENCE_VMA(GPR rs1, GPR rs2) noexcept; 694 void SFENCE_W_INVAL() noexcept; 695 void SINVAL_VMA(GPR rs1, GPR rs2) noexcept; 696 void SRET() noexcept; 697 void URET() noexcept; 698 void WFI() noexcept; 699 700 // Vector Extension Instructions 701 702 // Vector Integer Instructions 703 704 void VAADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 705 void VAADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 706 707 void VAADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 708 void VAADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 709 710 void VADC(Vec vd, Vec vs2, Vec vs1) noexcept; 711 void VADC(Vec vd, Vec vs2, GPR rs1) noexcept; 712 void VADC(Vec vd, Vec vs2, int32_t simm) noexcept; 713 714 void VADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 715 void VADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 716 void VADD(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 717 718 void VAND(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 719 void VAND(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 720 void VAND(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 721 722 void VASUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 723 void VASUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 724 725 void VASUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 726 void VASUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 727 728 void VCOMPRESS(Vec vd, Vec vs2, Vec vs1) noexcept; 729 730 void VDIV(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 731 void VDIV(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 732 733 void VDIVU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 734 void VDIVU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 735 736 void VFIRST(GPR rd, Vec vs, VecMask mask = VecMask::No) noexcept; 737 738 void VID(Vec vd, VecMask mask = VecMask::No) noexcept; 739 740 void VIOTA(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 741 742 void VMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 743 void VMACC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 744 745 void VMADC(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 746 void VMADC(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 747 void VMADC(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 748 749 void VMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 750 void VMADD(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 751 752 void VMAND(Vec vd, Vec vs2, Vec vs1) noexcept; 753 void VMANDNOT(Vec vd, Vec vs2, Vec vs1) noexcept; 754 void VMNAND(Vec vd, Vec vs2, Vec vs1) noexcept; 755 void VMNOR(Vec vd, Vec vs2, Vec vs1) noexcept; 756 void VMOR(Vec vd, Vec vs2, Vec vs1) noexcept; 757 void VMORNOT(Vec vd, Vec vs2, Vec vs1) noexcept; 758 void VMXNOR(Vec vd, Vec vs2, Vec vs1) noexcept; 759 void VMXOR(Vec vd, Vec vs2, Vec vs1) noexcept; 760 761 void VMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 762 void VMAX(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 763 764 void VMAXU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 765 void VMAXU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 766 767 void VMERGE(Vec vd, Vec vs2, Vec vs1) noexcept; 768 void VMERGE(Vec vd, Vec vs2, GPR rs1) noexcept; 769 void VMERGE(Vec vd, Vec vs2, int32_t simm) noexcept; 770 771 void VMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 772 void VMIN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 773 774 void VMINU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 775 void VMINU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 776 777 void VMSBC(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 778 void VMSBC(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 779 780 void VMSBF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 781 void VMSIF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 782 void VMSOF(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 783 784 void VMSEQ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 785 void VMSEQ(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 786 void VMSEQ(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 787 788 void VMSGT(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 789 void VMSGT(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 790 791 void VMSGTU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 792 void VMSGTU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 793 794 void VMSLE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 795 void VMSLE(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 796 void VMSLE(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 797 798 void VMSLEU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 799 void VMSLEU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 800 void VMSLEU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 801 802 void VMSLT(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 803 void VMSLT(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 804 805 void VMSLTU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 806 void VMSLTU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 807 808 void VMSNE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 809 void VMSNE(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 810 void VMSNE(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 811 812 void VMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 813 void VMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 814 815 void VMULH(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 816 void VMULH(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 817 818 void VMULHSU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 819 void VMULHSU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 820 821 void VMULHU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 822 void VMULHU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 823 824 void VMV(Vec vd, Vec vs1) noexcept; 825 void VMV(Vec vd, GPR rs1) noexcept; 826 void VMV(Vec vd, int32_t simm) noexcept; 827 828 void VMV1R(Vec vd, Vec vs) noexcept; 829 void VMV2R(Vec vd, Vec vs) noexcept; 830 void VMV4R(Vec vd, Vec vs) noexcept; 831 void VMV8R(Vec vd, Vec vs) noexcept; 832 833 void VMV_SX(Vec vd, GPR rs) noexcept; 834 void VMV_XS(GPR rd, Vec vs) noexcept; 835 836 void VNCLIP(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 837 void VNCLIP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 838 void VNCLIP(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 839 840 void VNCLIPU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 841 void VNCLIPU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 842 void VNCLIPU(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 843 844 void VNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 845 void VNMSAC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 846 847 void VNMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 848 void VNMSUB(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 849 850 void VNSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 851 void VNSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 852 void VNSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 853 854 void VNSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 855 void VNSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 856 void VNSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 857 858 void VOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 859 void VOR(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 860 void VOR(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 861 862 void VPOPC(GPR rd, Vec vs, VecMask mask = VecMask::No) noexcept; 863 864 void VREDAND(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 865 void VREDMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 866 void VREDMAXU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 867 void VREDMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 868 void VREDMINU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 869 void VREDOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 870 void VREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 871 void VREDXOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 872 873 void VREM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 874 void VREM(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 875 876 void VREMU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 877 void VREMU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 878 879 void VRGATHER(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 880 void VRGATHER(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 881 void VRGATHER(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 882 883 void VRGATHEREI16(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 884 885 void VRSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 886 void VRSUB(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 887 888 void VSADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 889 void VSADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 890 void VSADD(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 891 892 void VSADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 893 void VSADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 894 void VSADDU(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 895 896 void VSBC(Vec vd, Vec vs2, Vec vs1) noexcept; 897 void VSBC(Vec vd, Vec vs2, GPR rs1) noexcept; 898 899 void VSEXTVF2(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 900 void VSEXTVF4(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 901 void VSEXTVF8(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 902 903 void VSLIDE1DOWN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 904 void VSLIDEDOWN(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 905 void VSLIDEDOWN(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 906 907 void VSLIDE1UP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 908 void VSLIDEUP(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 909 void VSLIDEUP(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 910 911 void VSLL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 912 void VSLL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 913 void VSLL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 914 915 void VSMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 916 void VSMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 917 918 void VSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 919 void VSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 920 void VSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 921 922 void VSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 923 void VSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 924 void VSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 925 926 void VSSRA(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 927 void VSSRA(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 928 void VSSRA(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 929 930 void VSSRL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 931 void VSSRL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 932 void VSSRL(Vec vd, Vec vs2, uint32_t uimm, VecMask mask = VecMask::No) noexcept; 933 934 void VSSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 935 void VSSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 936 937 void VSSUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 938 void VSSUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 939 940 void VSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 941 void VSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 942 943 void VWADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 944 void VWADD(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 945 946 void VWADDW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 947 void VWADDW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 948 949 void VWADDU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 950 void VWADDU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 951 952 void VWADDUW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 953 void VWADDUW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 954 955 void VWMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 956 void VWMACC(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 957 958 void VWMACCSU(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 959 void VWMACCSU(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 960 961 void VWMACCU(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 962 void VWMACCU(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 963 964 void VWMACCUS(Vec vd, GPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 965 966 void VWMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 967 void VWMUL(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 968 969 void VWMULSU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 970 void VWMULSU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 971 972 void VWMULU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 973 void VWMULU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 974 975 void VWREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 976 void VWREDSUMU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 977 978 void VWSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 979 void VWSUB(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 980 981 void VWSUBW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 982 void VWSUBW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 983 984 void VWSUBU(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 985 void VWSUBU(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 986 987 void VWSUBUW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 988 void VWSUBUW(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 989 990 void VXOR(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 991 void VXOR(Vec vd, Vec vs2, GPR rs1, VecMask mask = VecMask::No) noexcept; 992 void VXOR(Vec vd, Vec vs2, int32_t simm, VecMask mask = VecMask::No) noexcept; 993 994 void VZEXTVF2(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 995 void VZEXTVF4(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 996 void VZEXTVF8(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 997 998 // Vector Floating-Point Instructions 999 1000 void VFADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1001 void VFADD(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1002 1003 void VFCLASS(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1004 1005 void VFCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1006 void VFCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1007 void VFCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1008 void VFCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1009 void VFCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1010 void VFCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1011 1012 void VFNCVT_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1013 void VFNCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1014 void VFNCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1015 void VFNCVT_ROD_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1016 void VFNCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1017 void VFNCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1018 void VFNCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1019 void VFNCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1020 1021 void VFWCVT_F_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1022 void VFWCVT_F_X(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1023 void VFWCVT_F_XU(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1024 void VFWCVT_RTZ_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1025 void VFWCVT_RTZ_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1026 void VFWCVT_X_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1027 void VFWCVT_XU_F(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1028 1029 void VFDIV(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1030 void VFDIV(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1031 void VFRDIV(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1032 1033 void VFREDMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1034 void VFREDMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1035 1036 void VFREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1037 void VFREDOSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1038 1039 void VFMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1040 void VFMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1041 1042 void VFMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1043 void VFMADD(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1044 1045 void VFMAX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1046 void VFMAX(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1047 1048 void VFMERGE(Vec vd, Vec vs2, FPR rs1) noexcept; 1049 1050 void VFMIN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1051 void VFMIN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1052 1053 void VFMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1054 void VFMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1055 1056 void VFMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1057 void VFMSUB(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1058 1059 void VFMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1060 void VFMUL(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1061 1062 void VFMV(Vec vd, FPR rs) noexcept; 1063 void VFMV_FS(FPR rd, Vec vs) noexcept; 1064 void VFMV_SF(Vec vd, FPR rs) noexcept; 1065 1066 void VFNMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1067 void VFNMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1068 1069 void VFNMADD(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1070 void VFNMADD(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1071 1072 void VFNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1073 void VFNMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1074 1075 void VFNMSUB(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1076 void VFNMSUB(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1077 1078 void VFREC7(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1079 1080 void VFSGNJ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1081 void VFSGNJ(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1082 1083 void VFSGNJN(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1084 void VFSGNJN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1085 1086 void VFSGNJX(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1087 void VFSGNJX(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1088 1089 void VFSQRT(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1090 void VFRSQRT7(Vec vd, Vec vs, VecMask mask = VecMask::No) noexcept; 1091 1092 void VFSLIDE1DOWN(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1093 void VFSLIDE1UP(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1094 1095 void VFSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1096 void VFSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1097 void VFRSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1098 1099 void VFWADD(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1100 void VFWADD(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1101 1102 void VFWADDW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1103 void VFWADDW(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1104 1105 void VFWMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1106 void VFWMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1107 1108 void VFWMUL(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1109 void VFWMUL(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1110 1111 void VFWNMACC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1112 void VFWNMACC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1113 1114 void VFWNMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1115 void VFWNMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1116 1117 void VFWREDSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1118 void VFWREDOSUM(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1119 1120 void VFWMSAC(Vec vd, Vec vs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1121 void VFWMSAC(Vec vd, FPR rs1, Vec vs2, VecMask mask = VecMask::No) noexcept; 1122 1123 void VFWSUB(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1124 void VFWSUB(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1125 1126 void VFWSUBW(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1127 void VFWSUBW(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1128 1129 void VMFEQ(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1130 void VMFEQ(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1131 1132 void VMFGE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1133 void VMFGT(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1134 1135 void VMFLE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1136 void VMFLE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1137 1138 void VMFLT(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1139 void VMFLT(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1140 1141 void VMFNE(Vec vd, Vec vs2, Vec vs1, VecMask mask = VecMask::No) noexcept; 1142 void VMFNE(Vec vd, Vec vs2, FPR rs1, VecMask mask = VecMask::No) noexcept; 1143 1144 // Vector Load/Store Instructions 1145 1146 void VLE8(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1147 void VLE16(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1148 void VLE32(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1149 void VLE64(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1150 void VLM(Vec vd, GPR rs) noexcept; 1151 1152 void VLSE8(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1153 void VLSE16(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1154 void VLSE32(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1155 void VLSE64(Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1156 1157 void VLOXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1158 void VLOXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1159 void VLOXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1160 void VLOXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1161 1162 void VLUXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1163 void VLUXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1164 void VLUXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1165 void VLUXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1166 1167 void VLE8FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1168 void VLE16FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1169 void VLE32FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1170 void VLE64FF(Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1171 1172 void VLSEGE8(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1173 void VLSEGE16(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1174 void VLSEGE32(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1175 void VLSEGE64(uint32_t num_segments, Vec vd, GPR rs, VecMask mask = VecMask::No) noexcept; 1176 1177 void VLSSEGE8(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1178 void VLSSEGE16(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1179 void VLSSEGE32(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1180 void VLSSEGE64(uint32_t num_segments, Vec vd, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1181 1182 void VLOXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1183 void VLOXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1184 void VLOXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1185 void VLOXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1186 1187 void VLUXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1188 void VLUXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1189 void VLUXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1190 void VLUXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1191 1192 void VLRE8(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1193 void VL1RE8(Vec vd, GPR rs) noexcept; 1194 void VL2RE8(Vec vd, GPR rs) noexcept; 1195 void VL4RE8(Vec vd, GPR rs) noexcept; 1196 void VL8RE8(Vec vd, GPR rs) noexcept; 1197 1198 void VLRE16(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1199 void VL1RE16(Vec vd, GPR rs) noexcept; 1200 void VL2RE16(Vec vd, GPR rs) noexcept; 1201 void VL4RE16(Vec vd, GPR rs) noexcept; 1202 void VL8RE16(Vec vd, GPR rs) noexcept; 1203 1204 void VLRE32(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1205 void VL1RE32(Vec vd, GPR rs) noexcept; 1206 void VL2RE32(Vec vd, GPR rs) noexcept; 1207 void VL4RE32(Vec vd, GPR rs) noexcept; 1208 void VL8RE32(Vec vd, GPR rs) noexcept; 1209 1210 void VLRE64(uint32_t num_registers, Vec vd, GPR rs) noexcept; 1211 void VL1RE64(Vec vd, GPR rs) noexcept; 1212 void VL2RE64(Vec vd, GPR rs) noexcept; 1213 void VL4RE64(Vec vd, GPR rs) noexcept; 1214 void VL8RE64(Vec vd, GPR rs) noexcept; 1215 1216 void VSE8(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1217 void VSE16(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1218 void VSE32(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1219 void VSE64(Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1220 void VSM(Vec vs, GPR rs) noexcept; 1221 1222 void VSSE8(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1223 void VSSE16(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1224 void VSSE32(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1225 void VSSE64(Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1226 1227 void VSOXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1228 void VSOXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1229 void VSOXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1230 void VSOXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1231 1232 void VSUXEI8(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1233 void VSUXEI16(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1234 void VSUXEI32(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1235 void VSUXEI64(Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1236 1237 void VSSEGE8(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1238 void VSSEGE16(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1239 void VSSEGE32(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1240 void VSSEGE64(uint32_t num_segments, Vec vs, GPR rs, VecMask mask = VecMask::No) noexcept; 1241 1242 void VSSSEGE8(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1243 void VSSSEGE16(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1244 void VSSSEGE32(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1245 void VSSSEGE64(uint32_t num_segments, Vec vs, GPR rs1, GPR rs2, VecMask mask = VecMask::No) noexcept; 1246 1247 void VSOXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1248 void VSOXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1249 void VSOXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1250 void VSOXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1251 1252 void VSUXSEGEI8(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1253 void VSUXSEGEI16(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1254 void VSUXSEGEI32(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1255 void VSUXSEGEI64(uint32_t num_segments, Vec vd, GPR rs, Vec vs, VecMask mask = VecMask::No) noexcept; 1256 1257 void VSR(uint32_t num_registers, Vec vs, GPR rs) noexcept; 1258 void VS1R(Vec vs, GPR rs) noexcept; 1259 void VS2R(Vec vs, GPR rs) noexcept; 1260 void VS4R(Vec vs, GPR rs) noexcept; 1261 void VS8R(Vec vs, GPR rs) noexcept; 1262 1263 // Vector Configuration Setting Instructions 1264 1265 void VSETIVLI(GPR rd, uint32_t imm, SEW sew, LMUL lmul = LMUL::M1, VTA vta = VTA::No, VMA vma = VMA::No) noexcept; 1266 void VSETVL(GPR rd, GPR rs1, GPR rs2) noexcept; 1267 void VSETVLI(GPR rd, GPR rs, SEW sew, LMUL lmul = LMUL::M1, VTA vta = VTA::No, VMA vma = VMA::No) noexcept; 1268 1269 private: 1270 // Binds a label to a given offset. 1271 void BindToOffset(Label* label, Label::LocationOffset offset); 1272 1273 // Links the given label and returns the offset to it. 1274 ptrdiff_t LinkAndGetOffset(Label* label); 1275 1276 // Resolves all label offsets and patches any necessary 1277 // branch offsets into the branch instructions that 1278 // requires them. 1279 void ResolveLabelOffsets(Label* label); 1280 1281 CodeBuffer m_buffer; 1282 }; 1283 1284 } // namespace biscuit