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							Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit FPU without implementing COP1X instructions. As the eligibility of 64 bit FP instructions is already determined by CP0St_FR, there is no need to check for COP1X again. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com> [PMD: Add missing trailing parenthesis (buildfix)] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>  | 
			3 years ago | |
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| .. | ||
| sysemu | 3 years ago | |
| dsp_helper.c | 5 years ago | |
| exception.c | 3 years ago | |
| fpu_helper.c | 5 years ago | |
| ldst_helper.c | 4 years ago | |
| lmmi_helper.c | 4 years ago | |
| meson.build | 3 years ago | |
| micromips_translate.c.inc | 3 years ago | |
| mips16e_translate.c.inc | 3 years ago | |
| msa.decode | 4 years ago | |
| msa_helper.c | 3 years ago | |
| msa_helper.h.inc | 5 years ago | |
| msa_translate.c | 3 years ago | |
| mxu_translate.c | 4 years ago | |
| nanomips_translate.c.inc | 3 years ago | |
| octeon.decode | 3 years ago | |
| octeon_translate.c | 3 years ago | |
| op_helper.c | 4 years ago | |
| rel6.decode | 4 years ago | |
| rel6_translate.c | 4 years ago | |
| sysemu_helper.h.inc | 3 years ago | |
| tcg-internal.h | 3 years ago | |
| trace-events | 4 years ago | |
| trace.h | 4 years ago | |
| translate.c | 3 years ago | |
| translate.h | 3 years ago | |
| translate_addr_const.c | 5 years ago | |
| tx79.decode | 4 years ago | |
| tx79_translate.c | 4 years ago | |
| txx9_translate.c | 5 years ago | |
| vr54xx.decode | 4 years ago | |
| vr54xx_helper.c | 4 years ago | |
| vr54xx_helper.h.inc | 4 years ago | |
| vr54xx_translate.c | 4 years ago | |