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38 lines
867 B
C
38 lines
867 B
C
/*
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* Arm M-profile RAS (Reliability, Availability and Serviceability) block
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*
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* Copyright (c) 2021 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/*
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* This is a model of the RAS register block of an M-profile CPU
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* (the registers starting at 0xE0005000 with ERRFRn).
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*
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* QEMU interface:
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* + sysbus MMIO region 0: the register bank
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*
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* The QEMU implementation currently provides "minimal RAS" only.
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*/
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#ifndef HW_MISC_ARMV7M_RAS_H
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#define HW_MISC_ARMV7M_RAS_H
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#include "hw/sysbus.h"
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#define TYPE_ARMV7M_RAS "armv7m-ras"
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OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MRAS, ARMV7M_RAS)
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struct ARMv7MRAS {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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};
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#endif
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