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71 lines
1.9 KiB
C
71 lines
1.9 KiB
C
/*
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* nRF51 System-on-Chip general purpose input/output register definition
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*
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* QEMU interface:
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* + sysbus MMIO regions 0: GPIO registers
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* + Unnamed GPIO inputs 0-31: Set tri-state input level for GPIO pin.
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* Level -1: Externally Disconnected/Floating; Pull-up/down will be regarded
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* Level 0: Input externally driven LOW
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* Level 1: Input externally driven HIGH
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* + Unnamed GPIO outputs 0-31:
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* Level -1: Disconnected/Floating
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* Level 0: Driven LOW
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* Level 1: Driven HIGH
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*
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* Accuracy of the peripheral model:
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* + The nRF51 GPIO output driver supports two modes, standard and high-current
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* mode. These different drive modes are not modeled and handled the same.
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* + Pin SENSEing is not modeled/implemented.
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*
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*/
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#ifndef NRF51_GPIO_H
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#define NRF51_GPIO_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_NRF51_GPIO "nrf51_soc.gpio"
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OBJECT_DECLARE_SIMPLE_TYPE(NRF51GPIOState, NRF51_GPIO)
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#define NRF51_GPIO_PINS 32
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#define NRF51_GPIO_SIZE 0x1000
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#define NRF51_GPIO_REG_OUT 0x504
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#define NRF51_GPIO_REG_OUTSET 0x508
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#define NRF51_GPIO_REG_OUTCLR 0x50C
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#define NRF51_GPIO_REG_IN 0x510
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#define NRF51_GPIO_REG_DIR 0x514
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#define NRF51_GPIO_REG_DIRSET 0x518
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#define NRF51_GPIO_REG_DIRCLR 0x51C
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#define NRF51_GPIO_REG_CNF_START 0x700
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#define NRF51_GPIO_REG_CNF_END 0x77C
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#define NRF51_GPIO_PULLDOWN 1
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#define NRF51_GPIO_PULLUP 3
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struct NRF51GPIOState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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qemu_irq irq;
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uint32_t out;
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uint32_t in;
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uint32_t in_mask;
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uint32_t dir;
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uint32_t cnf[NRF51_GPIO_PINS];
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uint32_t old_out;
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uint32_t old_out_connected;
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qemu_irq output[NRF51_GPIO_PINS];
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};
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#endif
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