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135 lines
4.6 KiB
C
135 lines
4.6 KiB
C
/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "sysemu/reset.h"
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "exec/memory.h"
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#include "qemu/error-report.h"
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#include "xtensa_memory.h"
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#include "xtensa_sim.h"
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static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
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{
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XtensaCPU *cpu = opaque;
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return cpu_get_phys_page_debug(CPU(cpu), addr);
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}
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static void sim_reset(void *opaque)
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{
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XtensaCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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}
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XtensaCPU *xtensa_sim_common_init(MachineState *machine)
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{
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XtensaCPU *cpu = NULL;
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CPUXtensaState *env = NULL;
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ram_addr_t ram_size = machine->ram_size;
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int n;
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for (n = 0; n < machine->smp.cpus; n++) {
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cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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env->sregs[PRID] = n;
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qemu_register_reset(sim_reset, cpu);
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/* Need MMU initialized prior to ELF loading,
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* so that ELF gets loaded into virtual addresses
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*/
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sim_reset(cpu);
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}
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if (env) {
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XtensaMemory sysram = env->config->sysram;
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sysram.location[0].size = ram_size;
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xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom",
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get_system_memory());
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xtensa_create_memory_regions(&env->config->instram, "xtensa.instram",
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get_system_memory());
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xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom",
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get_system_memory());
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xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram",
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get_system_memory());
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xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
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get_system_memory());
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xtensa_create_memory_regions(&sysram, "xtensa.sysram",
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get_system_memory());
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}
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if (serial_hd(0)) {
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xtensa_sim_open_console(serial_hd(0));
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}
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return cpu;
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}
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void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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#if TARGET_BIG_ENDIAN
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int big_endian = true;
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#else
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int big_endian = false;
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#endif
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if (kernel_filename) {
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uint64_t elf_entry;
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int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
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&elf_entry, NULL, NULL, NULL, big_endian,
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EM_XTENSA, 0, 0);
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if (success > 0) {
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cpu->env.pc = elf_entry;
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}
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}
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}
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static void xtensa_sim_init(MachineState *machine)
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{
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XtensaCPU *cpu = xtensa_sim_common_init(machine);
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xtensa_sim_load_kernel(cpu, machine);
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}
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static void xtensa_sim_machine_init(MachineClass *mc)
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{
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mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
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mc->is_default = true;
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mc->init = xtensa_sim_init;
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mc->max_cpus = 4;
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mc->no_serial = 1;
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mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
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}
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DEFINE_MACHINE("sim", xtensa_sim_machine_init)
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