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qemu/hw/riscv
Jason A. Donenfeld 64c75db3c5 riscv: re-randomize rng-seed on reboot
When the system reboots, the rng-seed that the FDT has should be
re-randomized, so that the new boot gets a new seed. Since the FDT is in
the ROM region at this point, we add a hook right after the ROM has been
added, so that we have a pointer to that copy of the FDT.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Cc: qemu-riscv@nongnu.org
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20221025004327.568476-6-Jason@zx2c4.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years ago
..
Kconfig hw/riscv: Enable TPM backends 3 years ago
boot.c riscv: re-randomize rng-seed on reboot 2 years ago
meson.build hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines 3 years ago
microchip_pfsoc.c hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals 2 years ago
numa.c hw: Do not include qemu/log.h if it is not necessary 4 years ago
opentitan.c hw/riscv: opentitan: Expose the resetvec as a SoC property 2 years ago
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 4 years ago
shakti_c.c hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() 2 years ago
sifive_e.c hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan) 3 years ago
sifive_u.c hw/riscv: set machine->fdt in sifive_u_machine_init() 2 years ago
spike.c hw/riscv: set machine->fdt in spike_board_init() 2 years ago
virt.c hw/riscv: virt: Enable booting S-mode firmware from pflash 2 years ago