qemu

FORK: QEMU emulator
git clone https://git.neptards.moe/neptards/qemu.git
Log | Files | Refs | Submodules | LICENSE

test_dsp_r1_extr_w.c (1839B)


      1 #include<stdio.h>
      2 #include<assert.h>
      3 
      4 int main()
      5 {
      6     int rt, ach, acl, dsp;
      7     int result;
      8 
      9     ach = 0x05;
     10     acl = 0xB4CB;
     11     result = 0xA0001699;
     12     __asm
     13         ("mthi %2, $ac1\n\t"
     14          "mtlo %3, $ac1\n\t"
     15          "extr.w %0, $ac1, 0x03\n\t"
     16          "rddsp %1\n\t"
     17          : "=r"(rt), "=r"(dsp)
     18          : "r"(ach), "r"(acl)
     19         );
     20     dsp = (dsp >> 23) & 0x01;
     21     assert(dsp == 1);
     22     assert(result == rt);
     23 
     24     /* Clear dspcontrol */
     25     dsp = 0;
     26     __asm
     27         ("wrdsp %0\n\t"
     28          :
     29          : "r"(dsp)
     30         );
     31 
     32     ach = 0x01;
     33     acl = 0xB4CB;
     34     result = 0x10000B4C;
     35     __asm
     36         ("mthi %2, $ac1\n\t"
     37          "mtlo %3, $ac1\n\t"
     38          "extr.w %0, $ac1, 0x04\n\t"
     39          "rddsp %1\n\t"
     40          : "=r"(rt), "=r"(dsp)
     41          : "r"(ach), "r"(acl)
     42         );
     43     dsp = (dsp >> 23) & 0x01;
     44     assert(dsp == 0);
     45     assert(result == rt);
     46 
     47     /* Clear dspcontrol */
     48     dsp = 0;
     49     __asm
     50         ("wrdsp %0\n\t"
     51          :
     52          : "r"(dsp)
     53         );
     54 
     55     ach = 0x3fffffff;
     56     acl = 0x2bcdef01;
     57     result = 0x7ffffffe;
     58     __asm
     59         ("mthi %2, $ac1\n\t"
     60          "mtlo %3, $ac1\n\t"
     61          "extr.w %0, $ac1, 0x1F\n\t"
     62          "rddsp %1\n\t"
     63          : "=r"(rt), "=r"(dsp)
     64          : "r"(ach), "r"(acl)
     65         );
     66     dsp = (dsp >> 23) & 0x01;
     67     assert(dsp == 0);
     68     assert(result == rt);
     69 
     70     /* Clear dspcontrol */
     71     dsp = 0;
     72     __asm
     73         ("wrdsp %0\n\t"
     74          :
     75          : "r"(dsp)
     76         );
     77 
     78     ach = 0xFFFFFFFF;
     79     acl = 0xFFFFFFFF;
     80     result = 0xFFFFFFFF;
     81     __asm
     82         ("mthi %2, $ac1\n\t"
     83          "mtlo %3, $ac1\n\t"
     84          "extr.w %0, $ac1, 0x1F\n\t"
     85          "rddsp %1\n\t"
     86          : "=r"(rt), "=r"(dsp)
     87          : "r"(ach), "r"(acl)
     88          );
     89     dsp = (dsp >> 23) & 0x01;
     90     assert(dsp == 0);
     91     assert(result == rt);
     92 
     93     return 0;
     94 }