qemu

FORK: QEMU emulator
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sdhci-cmd.h (2228B)


      1 /*
      2  * MMC Host Controller Commands
      3  *
      4  * Copyright (c) 2021 Google LLC
      5  *
      6  * This program is free software; you can redistribute it and/or modify it
      7  * under the terms of the GNU General Public License as published by the
      8  * Free Software Foundation; either version 2 of the License, or
      9  * (at your option) any later version.
     10  *
     11  * This program is distributed in the hope that it will be useful, but WITHOUT
     12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
     14  * for more details.
     15  */
     16 
     17 #include "../libqtest.h"
     18 
     19 /* more details at hw/sd/sdhci-internal.h */
     20 #define SDHC_BLKSIZE 0x04
     21 #define SDHC_BLKCNT 0x06
     22 #define SDHC_ARGUMENT 0x08
     23 #define SDHC_TRNMOD 0x0C
     24 #define SDHC_CMDREG 0x0E
     25 #define SDHC_BDATA 0x20
     26 #define SDHC_PRNSTS 0x24
     27 #define SDHC_BLKGAP 0x2A
     28 #define SDHC_CLKCON 0x2C
     29 #define SDHC_SWRST 0x2F
     30 #define SDHC_CAPAB 0x40
     31 #define SDHC_MAXCURR 0x48
     32 #define SDHC_HCVER 0xFE
     33 
     34 /* TRNSMOD Reg */
     35 #define SDHC_TRNS_BLK_CNT_EN 0x0002
     36 #define SDHC_TRNS_READ 0x0010
     37 #define SDHC_TRNS_WRITE 0x0000
     38 #define SDHC_TRNS_MULTI 0x0020
     39 
     40 /* CMD Reg */
     41 #define SDHC_CMD_DATA_PRESENT (1 << 5)
     42 #define SDHC_ALL_SEND_CID (2 << 8)
     43 #define SDHC_SEND_RELATIVE_ADDR (3 << 8)
     44 #define SDHC_SELECT_DESELECT_CARD (7 << 8)
     45 #define SDHC_SEND_CSD (9 << 8)
     46 #define SDHC_STOP_TRANSMISSION (12 << 8)
     47 #define SDHC_READ_MULTIPLE_BLOCK (18 << 8)
     48 #define SDHC_WRITE_MULTIPLE_BLOCK (25 << 8)
     49 #define SDHC_APP_CMD (55 << 8)
     50 
     51 /* SWRST Reg */
     52 #define SDHC_RESET_ALL 0x01
     53 
     54 /* CLKCTRL Reg */
     55 #define SDHC_CLOCK_INT_EN 0x0001
     56 #define SDHC_CLOCK_INT_STABLE 0x0002
     57 #define SDHC_CLOCK_SDCLK_EN (1 << 2)
     58 
     59 /* Set registers needed to send commands to SD */
     60 void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize,
     61                     uint16_t blkcnt, uint32_t argument, uint16_t trnmod,
     62                     uint16_t cmdreg);
     63 
     64 /* Read at most 1 block of SD using non-DMA  */
     65 ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg,
     66                        size_t count);
     67 
     68 /* Write at most 1 block of SD using non-DMA  */
     69 void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg,
     70                      size_t count, size_t blksize);