insn32.decode (46261B)
1 # 2 # RISC-V translation routines for the RVXI Base Integer Instruction Set. 3 # 4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de 5 # Bastian Koppelmann, kbastian@mail.uni-paderborn.de 6 # 7 # This program is free software; you can redistribute it and/or modify it 8 # under the terms and conditions of the GNU General Public License, 9 # version 2 or later, as published by the Free Software Foundation. 10 # 11 # This program is distributed in the hope it will be useful, but WITHOUT 12 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 # more details. 15 # 16 # You should have received a copy of the GNU General Public License along with 17 # this program. If not, see <http://www.gnu.org/licenses/>. 18 19 # Fields: 20 %rs3 27:5 21 %rs2 20:5 22 %rs1 15:5 23 %rd 7:5 24 %sh5 20:5 25 %sh6 20:6 26 27 %sh7 20:7 28 %csr 20:12 29 %rm 12:3 30 %nf 29:3 !function=ex_plus_1 31 32 # immediates: 33 %imm_i 20:s12 34 %imm_s 25:s7 7:5 35 %imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 36 %imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 37 %imm_u 12:s20 !function=ex_shift_12 38 %imm_bs 30:2 !function=ex_shift_3 39 %imm_rnum 20:4 40 41 # Argument sets: 42 &empty 43 &b imm rs2 rs1 44 &i imm rs1 rd 45 &j imm rd 46 &r rd rs1 rs2 47 &r2 rd rs1 48 &r2_s rs1 rs2 49 &s imm rs1 rs2 50 &u imm rd 51 &shift shamt rs1 rd 52 &atomic aq rl rs2 rs1 rd 53 &rmrr vm rd rs1 rs2 54 &rmr vm rd rs2 55 &r2nfvm vm rd rs1 nf 56 &rnfvm vm rd rs1 rs2 nf 57 &k_aes shamt rs2 rs1 rd 58 59 # Formats 32: 60 @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 61 @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd 62 @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 63 @s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1 64 @u .................... ..... ....... &u imm=%imm_u %rd 65 @j .................... ..... ....... &j imm=%imm_j %rd 66 67 @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh7 %rs1 %rd 68 @csr ............ ..... ... ..... ....... %csr %rs1 %rd 69 70 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd 71 @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd 72 73 @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd 74 @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd 75 @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd 76 @r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd 77 @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd 78 @r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd 79 @r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd 80 @r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd 81 @r2rd ....... ..... ..... ... ..... ....... %rs2 %rd 82 @r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd 83 @r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd 84 @r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd 85 @r2_zimm11 . zimm:11 ..... ... ..... ....... %rs1 %rd 86 @r2_zimm10 .. zimm:10 ..... ... ..... ....... %rs1 %rd 87 @r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1 88 89 @hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1 90 @hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1 91 92 @sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 93 @sfence_vm ....... ..... ..... ... ..... ....... %rs1 94 95 @k_aes .. ..... ..... ..... ... ..... ....... &k_aes shamt=%imm_bs %rs2 %rs1 %rd 96 @i_aes .. ..... ..... ..... ... ..... ....... &i imm=%imm_rnum %rs1 %rd 97 98 # Formats 64: 99 @sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd 100 101 # Formats 128: 102 @sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd 103 104 # *** Privileged Instructions *** 105 ecall 000000000000 00000 000 00000 1110011 106 ebreak 000000000001 00000 000 00000 1110011 107 uret 0000000 00010 00000 000 00000 1110011 108 sret 0001000 00010 00000 000 00000 1110011 109 mret 0011000 00010 00000 000 00000 1110011 110 wfi 0001000 00101 00000 000 00000 1110011 111 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma 112 sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm 113 114 # *** RV32I Base Instruction Set *** 115 lui .................... ..... 0110111 @u 116 auipc .................... ..... 0010111 @u 117 jal .................... ..... 1101111 @j 118 jalr ............ ..... 000 ..... 1100111 @i 119 beq ....... ..... ..... 000 ..... 1100011 @b 120 bne ....... ..... ..... 001 ..... 1100011 @b 121 blt ....... ..... ..... 100 ..... 1100011 @b 122 bge ....... ..... ..... 101 ..... 1100011 @b 123 bltu ....... ..... ..... 110 ..... 1100011 @b 124 bgeu ....... ..... ..... 111 ..... 1100011 @b 125 lb ............ ..... 000 ..... 0000011 @i 126 lh ............ ..... 001 ..... 0000011 @i 127 lw ............ ..... 010 ..... 0000011 @i 128 lbu ............ ..... 100 ..... 0000011 @i 129 lhu ............ ..... 101 ..... 0000011 @i 130 sb ....... ..... ..... 000 ..... 0100011 @s 131 sh ....... ..... ..... 001 ..... 0100011 @s 132 sw ....... ..... ..... 010 ..... 0100011 @s 133 addi ............ ..... 000 ..... 0010011 @i 134 slti ............ ..... 010 ..... 0010011 @i 135 sltiu ............ ..... 011 ..... 0010011 @i 136 xori ............ ..... 100 ..... 0010011 @i 137 ori ............ ..... 110 ..... 0010011 @i 138 andi ............ ..... 111 ..... 0010011 @i 139 slli 00000. ...... ..... 001 ..... 0010011 @sh 140 srli 00000. ...... ..... 101 ..... 0010011 @sh 141 srai 01000. ...... ..... 101 ..... 0010011 @sh 142 add 0000000 ..... ..... 000 ..... 0110011 @r 143 sub 0100000 ..... ..... 000 ..... 0110011 @r 144 sll 0000000 ..... ..... 001 ..... 0110011 @r 145 slt 0000000 ..... ..... 010 ..... 0110011 @r 146 sltu 0000000 ..... ..... 011 ..... 0110011 @r 147 xor 0000000 ..... ..... 100 ..... 0110011 @r 148 srl 0000000 ..... ..... 101 ..... 0110011 @r 149 sra 0100000 ..... ..... 101 ..... 0110011 @r 150 or 0000000 ..... ..... 110 ..... 0110011 @r 151 and 0000000 ..... ..... 111 ..... 0110011 @r 152 153 { 154 pause 0000 0001 0000 00000 000 00000 0001111 155 fence ---- pred:4 succ:4 ----- 000 ----- 0001111 156 } 157 158 fence_i ---- ---- ---- ----- 001 ----- 0001111 159 csrrw ............ ..... 001 ..... 1110011 @csr 160 csrrs ............ ..... 010 ..... 1110011 @csr 161 csrrc ............ ..... 011 ..... 1110011 @csr 162 csrrwi ............ ..... 101 ..... 1110011 @csr 163 csrrsi ............ ..... 110 ..... 1110011 @csr 164 csrrci ............ ..... 111 ..... 1110011 @csr 165 166 # *** RV64I Base Instruction Set (in addition to RV32I) *** 167 lwu ............ ..... 110 ..... 0000011 @i 168 ld ............ ..... 011 ..... 0000011 @i 169 sd ....... ..... ..... 011 ..... 0100011 @s 170 addiw ............ ..... 000 ..... 0011011 @i 171 slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 172 srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 173 sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 174 addw 0000000 ..... ..... 000 ..... 0111011 @r 175 subw 0100000 ..... ..... 000 ..... 0111011 @r 176 sllw 0000000 ..... ..... 001 ..... 0111011 @r 177 srlw 0000000 ..... ..... 101 ..... 0111011 @r 178 sraw 0100000 ..... ..... 101 ..... 0111011 @r 179 180 # *** RV128I Base Instruction Set (in addition to RV64I) *** 181 ldu ............ ..... 111 ..... 0000011 @i 182 lq ............ ..... 010 ..... 0001111 @i 183 sq ............ ..... 100 ..... 0100011 @s 184 addid ............ ..... 000 ..... 1011011 @i 185 sllid 000000 ...... ..... 001 ..... 1011011 @sh6 186 srlid 000000 ...... ..... 101 ..... 1011011 @sh6 187 sraid 010000 ...... ..... 101 ..... 1011011 @sh6 188 addd 0000000 ..... ..... 000 ..... 1111011 @r 189 subd 0100000 ..... ..... 000 ..... 1111011 @r 190 slld 0000000 ..... ..... 001 ..... 1111011 @r 191 srld 0000000 ..... ..... 101 ..... 1111011 @r 192 srad 0100000 ..... ..... 101 ..... 1111011 @r 193 194 # *** RV32M Standard Extension *** 195 mul 0000001 ..... ..... 000 ..... 0110011 @r 196 mulh 0000001 ..... ..... 001 ..... 0110011 @r 197 mulhsu 0000001 ..... ..... 010 ..... 0110011 @r 198 mulhu 0000001 ..... ..... 011 ..... 0110011 @r 199 div 0000001 ..... ..... 100 ..... 0110011 @r 200 divu 0000001 ..... ..... 101 ..... 0110011 @r 201 rem 0000001 ..... ..... 110 ..... 0110011 @r 202 remu 0000001 ..... ..... 111 ..... 0110011 @r 203 204 # *** RV64M Standard Extension (in addition to RV32M) *** 205 mulw 0000001 ..... ..... 000 ..... 0111011 @r 206 divw 0000001 ..... ..... 100 ..... 0111011 @r 207 divuw 0000001 ..... ..... 101 ..... 0111011 @r 208 remw 0000001 ..... ..... 110 ..... 0111011 @r 209 remuw 0000001 ..... ..... 111 ..... 0111011 @r 210 211 # *** RV128M Standard Extension (in addition to RV64M) *** 212 muld 0000001 ..... ..... 000 ..... 1111011 @r 213 divd 0000001 ..... ..... 100 ..... 1111011 @r 214 divud 0000001 ..... ..... 101 ..... 1111011 @r 215 remd 0000001 ..... ..... 110 ..... 1111011 @r 216 remud 0000001 ..... ..... 111 ..... 1111011 @r 217 218 # *** RV32A Standard Extension *** 219 lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld 220 sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st 221 amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st 222 amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st 223 amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st 224 amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st 225 amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st 226 amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st 227 amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st 228 amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st 229 amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st 230 231 # *** RV64A Standard Extension (in addition to RV32A) *** 232 lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld 233 sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st 234 amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st 235 amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st 236 amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st 237 amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st 238 amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st 239 amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st 240 amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st 241 amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st 242 amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st 243 244 # *** RV32F Standard Extension *** 245 flw ............ ..... 010 ..... 0000111 @i 246 fsw ....... ..... ..... 010 ..... 0100111 @s 247 fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm 248 fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm 249 fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm 250 fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm 251 fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm 252 fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm 253 fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm 254 fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm 255 fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm 256 fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r 257 fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r 258 fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r 259 fmin_s 0010100 ..... ..... 000 ..... 1010011 @r 260 fmax_s 0010100 ..... ..... 001 ..... 1010011 @r 261 fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm 262 fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm 263 fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 264 feq_s 1010000 ..... ..... 010 ..... 1010011 @r 265 flt_s 1010000 ..... ..... 001 ..... 1010011 @r 266 fle_s 1010000 ..... ..... 000 ..... 1010011 @r 267 fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 268 fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm 269 fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm 270 fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 271 272 # *** RV64F Standard Extension (in addition to RV32F) *** 273 fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm 274 fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm 275 fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm 276 fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm 277 278 # *** RV32D Standard Extension *** 279 fld ............ ..... 011 ..... 0000111 @i 280 fsd ....... ..... ..... 011 ..... 0100111 @s 281 fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm 282 fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm 283 fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm 284 fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm 285 fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm 286 fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm 287 fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm 288 fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm 289 fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm 290 fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r 291 fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r 292 fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r 293 fmin_d 0010101 ..... ..... 000 ..... 1010011 @r 294 fmax_d 0010101 ..... ..... 001 ..... 1010011 @r 295 fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm 296 fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm 297 feq_d 1010001 ..... ..... 010 ..... 1010011 @r 298 flt_d 1010001 ..... ..... 001 ..... 1010011 @r 299 fle_d 1010001 ..... ..... 000 ..... 1010011 @r 300 fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 301 fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm 302 fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm 303 fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm 304 fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm 305 306 # *** RV64D Standard Extension (in addition to RV32D) *** 307 fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm 308 fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm 309 fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 310 fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm 311 fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm 312 fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 313 314 # *** RV32H Base Instruction Set *** 315 hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2 316 hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2 317 hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2 318 hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2 319 hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2 320 hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2 321 hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2 322 hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s 323 hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s 324 hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s 325 hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma 326 hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma 327 328 # *** RV64H Base Instruction Set *** 329 hlv_wu 0110100 00001 ..... 100 ..... 1110011 @r2 330 hlv_d 0110110 00000 ..... 100 ..... 1110011 @r2 331 hsv_d 0110111 ..... ..... 100 00000 1110011 @r2_s 332 333 # *** Vector loads and stores are encoded within LOADFP/STORE-FP *** 334 # Vector unit-stride load/store insns. 335 vle8_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm 336 vle16_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm 337 vle32_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm 338 vle64_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm 339 vse8_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm 340 vse16_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm 341 vse32_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm 342 vse64_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm 343 344 # Vector unit-stride mask load/store insns. 345 vlm_v 000 000 1 01011 ..... 000 ..... 0000111 @r2 346 vsm_v 000 000 1 01011 ..... 000 ..... 0100111 @r2 347 348 # Vector strided insns. 349 vlse8_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm 350 vlse16_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm 351 vlse32_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm 352 vlse64_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm 353 vsse8_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm 354 vsse16_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm 355 vsse32_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm 356 vsse64_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm 357 358 # Vector ordered-indexed and unordered-indexed load insns. 359 vlxei8_v ... 0-1 . ..... ..... 000 ..... 0000111 @r_nfvm 360 vlxei16_v ... 0-1 . ..... ..... 101 ..... 0000111 @r_nfvm 361 vlxei32_v ... 0-1 . ..... ..... 110 ..... 0000111 @r_nfvm 362 vlxei64_v ... 0-1 . ..... ..... 111 ..... 0000111 @r_nfvm 363 364 # Vector ordered-indexed and unordered-indexed store insns. 365 vsxei8_v ... 0-1 . ..... ..... 000 ..... 0100111 @r_nfvm 366 vsxei16_v ... 0-1 . ..... ..... 101 ..... 0100111 @r_nfvm 367 vsxei32_v ... 0-1 . ..... ..... 110 ..... 0100111 @r_nfvm 368 vsxei64_v ... 0-1 . ..... ..... 111 ..... 0100111 @r_nfvm 369 370 # Vector unit-stride fault-only-first load insns. 371 vle8ff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm 372 vle16ff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm 373 vle32ff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm 374 vle64ff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm 375 376 # Vector whole register insns 377 vl1re8_v 000 000 1 01000 ..... 000 ..... 0000111 @r2 378 vl1re16_v 000 000 1 01000 ..... 101 ..... 0000111 @r2 379 vl1re32_v 000 000 1 01000 ..... 110 ..... 0000111 @r2 380 vl1re64_v 000 000 1 01000 ..... 111 ..... 0000111 @r2 381 vl2re8_v 001 000 1 01000 ..... 000 ..... 0000111 @r2 382 vl2re16_v 001 000 1 01000 ..... 101 ..... 0000111 @r2 383 vl2re32_v 001 000 1 01000 ..... 110 ..... 0000111 @r2 384 vl2re64_v 001 000 1 01000 ..... 111 ..... 0000111 @r2 385 vl4re8_v 011 000 1 01000 ..... 000 ..... 0000111 @r2 386 vl4re16_v 011 000 1 01000 ..... 101 ..... 0000111 @r2 387 vl4re32_v 011 000 1 01000 ..... 110 ..... 0000111 @r2 388 vl4re64_v 011 000 1 01000 ..... 111 ..... 0000111 @r2 389 vl8re8_v 111 000 1 01000 ..... 000 ..... 0000111 @r2 390 vl8re16_v 111 000 1 01000 ..... 101 ..... 0000111 @r2 391 vl8re32_v 111 000 1 01000 ..... 110 ..... 0000111 @r2 392 vl8re64_v 111 000 1 01000 ..... 111 ..... 0000111 @r2 393 vs1r_v 000 000 1 01000 ..... 000 ..... 0100111 @r2 394 vs2r_v 001 000 1 01000 ..... 000 ..... 0100111 @r2 395 vs4r_v 011 000 1 01000 ..... 000 ..... 0100111 @r2 396 vs8r_v 111 000 1 01000 ..... 000 ..... 0100111 @r2 397 398 # *** new major opcode OP-V *** 399 vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm 400 vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm 401 vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm 402 vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm 403 vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm 404 vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm 405 vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm 406 vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm 407 vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm 408 vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm 409 vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm 410 vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm 411 vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm 412 vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm 413 vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm 414 vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm 415 vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm 416 vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm 417 vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm 418 vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm 419 vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm 420 vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm 421 vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm 422 vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 423 vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 424 vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 425 vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm 426 vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm 427 vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm 428 vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 429 vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 430 vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm 431 vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm 432 vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm 433 vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm 434 vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm 435 vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm 436 vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm 437 vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm 438 vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm 439 vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm 440 vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm 441 vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm 442 vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm 443 vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm 444 vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm 445 vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm 446 vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm 447 vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm 448 vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm 449 vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm 450 vnsrl_wv 101100 . ..... ..... 000 ..... 1010111 @r_vm 451 vnsrl_wx 101100 . ..... ..... 100 ..... 1010111 @r_vm 452 vnsrl_wi 101100 . ..... ..... 011 ..... 1010111 @r_vm 453 vnsra_wv 101101 . ..... ..... 000 ..... 1010111 @r_vm 454 vnsra_wx 101101 . ..... ..... 100 ..... 1010111 @r_vm 455 vnsra_wi 101101 . ..... ..... 011 ..... 1010111 @r_vm 456 vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm 457 vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm 458 vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm 459 vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm 460 vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm 461 vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm 462 vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm 463 vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm 464 vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm 465 vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm 466 vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm 467 vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm 468 vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm 469 vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm 470 vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm 471 vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm 472 vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm 473 vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm 474 vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm 475 vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm 476 vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm 477 vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm 478 vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm 479 vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm 480 vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm 481 vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm 482 vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm 483 vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm 484 vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm 485 vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm 486 vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm 487 vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm 488 vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm 489 vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm 490 vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm 491 vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm 492 vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm 493 vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm 494 vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm 495 vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm 496 vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm 497 vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm 498 vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm 499 vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm 500 vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm 501 vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm 502 vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm 503 vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm 504 vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm 505 vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm 506 vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm 507 vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm 508 vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm 509 vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm 510 vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm 511 vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm 512 vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm 513 vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm 514 vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm 515 vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm 516 vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm 517 vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm 518 vwmaccsu_vv 111111 . ..... ..... 010 ..... 1010111 @r_vm 519 vwmaccsu_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm 520 vwmaccus_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm 521 vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 522 vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 523 vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 524 vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 525 vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 526 vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 527 vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm 528 vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm 529 vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm 530 vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm 531 vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm 532 vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm 533 vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm 534 vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm 535 vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm 536 vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm 537 vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm 538 vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm 539 vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm 540 vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm 541 vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm 542 vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm 543 vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm 544 vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm 545 vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm 546 vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm 547 vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm 548 vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm 549 vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm 550 vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm 551 vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm 552 vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm 553 vnclipu_wv 101110 . ..... ..... 000 ..... 1010111 @r_vm 554 vnclipu_wx 101110 . ..... ..... 100 ..... 1010111 @r_vm 555 vnclipu_wi 101110 . ..... ..... 011 ..... 1010111 @r_vm 556 vnclip_wv 101111 . ..... ..... 000 ..... 1010111 @r_vm 557 vnclip_wx 101111 . ..... ..... 100 ..... 1010111 @r_vm 558 vnclip_wi 101111 . ..... ..... 011 ..... 1010111 @r_vm 559 vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm 560 vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm 561 vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm 562 vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm 563 vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm 564 vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm 565 vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm 566 vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm 567 vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm 568 vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm 569 vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm 570 vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm 571 vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm 572 vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm 573 vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm 574 vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm 575 vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm 576 vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm 577 vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm 578 vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm 579 vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm 580 vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm 581 vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm 582 vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm 583 vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm 584 vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm 585 vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm 586 vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm 587 vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm 588 vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm 589 vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm 590 vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm 591 vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm 592 vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm 593 vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm 594 vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm 595 vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm 596 vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm 597 vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm 598 vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm 599 vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm 600 vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm 601 vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm 602 vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm 603 vfsqrt_v 010011 . ..... 00000 001 ..... 1010111 @r2_vm 604 vfrsqrt7_v 010011 . ..... 00100 001 ..... 1010111 @r2_vm 605 vfrec7_v 010011 . ..... 00101 001 ..... 1010111 @r2_vm 606 vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm 607 vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm 608 vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm 609 vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm 610 vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm 611 vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm 612 vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm 613 vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm 614 vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm 615 vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm 616 vfslide1up_vf 001110 . ..... ..... 101 ..... 1010111 @r_vm 617 vfslide1down_vf 001111 . ..... ..... 101 ..... 1010111 @r_vm 618 vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm 619 vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm 620 vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm 621 vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm 622 vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm 623 vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm 624 vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm 625 vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm 626 vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm 627 vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm 628 vfclass_v 010011 . ..... 10000 001 ..... 1010111 @r2_vm 629 vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0 630 vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2 631 632 vfcvt_xu_f_v 010010 . ..... 00000 001 ..... 1010111 @r2_vm 633 vfcvt_x_f_v 010010 . ..... 00001 001 ..... 1010111 @r2_vm 634 vfcvt_f_xu_v 010010 . ..... 00010 001 ..... 1010111 @r2_vm 635 vfcvt_f_x_v 010010 . ..... 00011 001 ..... 1010111 @r2_vm 636 vfcvt_rtz_xu_f_v 010010 . ..... 00110 001 ..... 1010111 @r2_vm 637 vfcvt_rtz_x_f_v 010010 . ..... 00111 001 ..... 1010111 @r2_vm 638 639 vfwcvt_xu_f_v 010010 . ..... 01000 001 ..... 1010111 @r2_vm 640 vfwcvt_x_f_v 010010 . ..... 01001 001 ..... 1010111 @r2_vm 641 vfwcvt_f_xu_v 010010 . ..... 01010 001 ..... 1010111 @r2_vm 642 vfwcvt_f_x_v 010010 . ..... 01011 001 ..... 1010111 @r2_vm 643 vfwcvt_f_f_v 010010 . ..... 01100 001 ..... 1010111 @r2_vm 644 vfwcvt_rtz_xu_f_v 010010 . ..... 01110 001 ..... 1010111 @r2_vm 645 vfwcvt_rtz_x_f_v 010010 . ..... 01111 001 ..... 1010111 @r2_vm 646 647 vfncvt_xu_f_w 010010 . ..... 10000 001 ..... 1010111 @r2_vm 648 vfncvt_x_f_w 010010 . ..... 10001 001 ..... 1010111 @r2_vm 649 vfncvt_f_xu_w 010010 . ..... 10010 001 ..... 1010111 @r2_vm 650 vfncvt_f_x_w 010010 . ..... 10011 001 ..... 1010111 @r2_vm 651 vfncvt_f_f_w 010010 . ..... 10100 001 ..... 1010111 @r2_vm 652 vfncvt_rod_f_f_w 010010 . ..... 10101 001 ..... 1010111 @r2_vm 653 vfncvt_rtz_xu_f_w 010010 . ..... 10110 001 ..... 1010111 @r2_vm 654 vfncvt_rtz_x_f_w 010010 . ..... 10111 001 ..... 1010111 @r2_vm 655 656 vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm 657 vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm 658 vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm 659 vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm 660 vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm 661 vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm 662 vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm 663 vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm 664 vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm 665 vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm 666 # Vector ordered and unordered reduction sum 667 vfredusum_vs 000001 . ..... ..... 001 ..... 1010111 @r_vm 668 vfredosum_vs 000011 . ..... ..... 001 ..... 1010111 @r_vm 669 vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm 670 vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm 671 # Vector widening ordered and unordered float reduction sum 672 vfwredusum_vs 110001 . ..... ..... 001 ..... 1010111 @r_vm 673 vfwredosum_vs 110011 . ..... ..... 001 ..... 1010111 @r_vm 674 vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r 675 vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r 676 vmandn_mm 011000 - ..... ..... 010 ..... 1010111 @r 677 vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r 678 vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r 679 vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r 680 vmorn_mm 011100 - ..... ..... 010 ..... 1010111 @r 681 vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r 682 vcpop_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm 683 vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm 684 vmsbf_m 010100 . ..... 00001 010 ..... 1010111 @r2_vm 685 vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm 686 vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm 687 viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm 688 vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm 689 vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd 690 vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 691 vfmv_f_s 010000 1 ..... 00000 001 ..... 1010111 @r2rd 692 vfmv_s_f 010000 1 00000 ..... 101 ..... 1010111 @r2 693 vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm 694 vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm 695 vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm 696 vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm 697 vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm 698 vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm 699 vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm 700 vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm 701 vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm 702 vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm 703 vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r 704 vmv1r_v 100111 1 ..... 00000 011 ..... 1010111 @r2rd 705 vmv2r_v 100111 1 ..... 00001 011 ..... 1010111 @r2rd 706 vmv4r_v 100111 1 ..... 00011 011 ..... 1010111 @r2rd 707 vmv8r_v 100111 1 ..... 00111 011 ..... 1010111 @r2rd 708 709 # Vector Integer Extension 710 vzext_vf2 010010 . ..... 00110 010 ..... 1010111 @r2_vm 711 vzext_vf4 010010 . ..... 00100 010 ..... 1010111 @r2_vm 712 vzext_vf8 010010 . ..... 00010 010 ..... 1010111 @r2_vm 713 vsext_vf2 010010 . ..... 00111 010 ..... 1010111 @r2_vm 714 vsext_vf4 010010 . ..... 00101 010 ..... 1010111 @r2_vm 715 vsext_vf8 010010 . ..... 00011 010 ..... 1010111 @r2_vm 716 717 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm11 718 vsetivli 11 .......... ..... 111 ..... 1010111 @r2_zimm10 719 vsetvl 1000000 ..... ..... 111 ..... 1010111 @r 720 721 # *** RV32 Zba Standard Extension *** 722 sh1add 0010000 .......... 010 ..... 0110011 @r 723 sh2add 0010000 .......... 100 ..... 0110011 @r 724 sh3add 0010000 .......... 110 ..... 0110011 @r 725 726 # *** RV64 Zba Standard Extension (in addition to RV32 Zba) *** 727 add_uw 0000100 .......... 000 ..... 0111011 @r 728 sh1add_uw 0010000 .......... 010 ..... 0111011 @r 729 sh2add_uw 0010000 .......... 100 ..... 0111011 @r 730 sh3add_uw 0010000 .......... 110 ..... 0111011 @r 731 slli_uw 00001 ............ 001 ..... 0011011 @sh 732 733 # *** RV32 Zbb/Zbkb Standard Extension *** 734 andn 0100000 .......... 111 ..... 0110011 @r 735 rol 0110000 .......... 001 ..... 0110011 @r 736 ror 0110000 .......... 101 ..... 0110011 @r 737 rori 01100 ............ 101 ..... 0010011 @sh 738 # The encoding for rev8 differs between RV32 and RV64. 739 # rev8_32 denotes the RV32 variant. 740 rev8_32 011010 011000 ..... 101 ..... 0010011 @r2 741 # The encoding for zext.h differs between RV32 and RV64. 742 # zext_h_32 denotes the RV32 variant. 743 { 744 zext_h_32 0000100 00000 ..... 100 ..... 0110011 @r2 745 pack 0000100 ..... ..... 100 ..... 0110011 @r 746 } 747 xnor 0100000 .......... 100 ..... 0110011 @r 748 # *** RV32 extra Zbb Standard Extension *** 749 clz 011000 000000 ..... 001 ..... 0010011 @r2 750 cpop 011000 000010 ..... 001 ..... 0010011 @r2 751 ctz 011000 000001 ..... 001 ..... 0010011 @r2 752 max 0000101 .......... 110 ..... 0110011 @r 753 maxu 0000101 .......... 111 ..... 0110011 @r 754 min 0000101 .......... 100 ..... 0110011 @r 755 minu 0000101 .......... 101 ..... 0110011 @r 756 orc_b 001010 000111 ..... 101 ..... 0010011 @r2 757 orn 0100000 .......... 110 ..... 0110011 @r 758 sext_b 011000 000100 ..... 001 ..... 0010011 @r2 759 sext_h 011000 000101 ..... 001 ..... 0010011 @r2 760 # *** RV32 extra Zbkb Standard Extension *** 761 brev8 0110100 00111 ..... 101 ..... 0010011 @r2 #grevi 762 packh 0000100 .......... 111 ..... 0110011 @r 763 unzip 0000100 01111 ..... 101 ..... 0010011 @r2 #unshfl 764 zip 0000100 01111 ..... 001 ..... 0010011 @r2 #shfl 765 766 # *** RV64 Zbb/Zbkb Standard Extension (in addition to RV32 Zbb/Zbkb) *** 767 # The encoding for rev8 differs between RV32 and RV64. 768 # When executing on RV64, the encoding used in RV32 is an illegal 769 # instruction, so we use different handler functions to differentiate. 770 rev8_64 011010 111000 ..... 101 ..... 0010011 @r2 771 rolw 0110000 .......... 001 ..... 0111011 @r 772 roriw 0110000 .......... 101 ..... 0011011 @sh5 773 rorw 0110000 .......... 101 ..... 0111011 @r 774 # The encoding for zext.h differs between RV32 and RV64. 775 # When executing on RV64, the encoding used in RV32 is an illegal 776 # instruction, so we use different handler functions to differentiate. 777 { 778 zext_h_64 0000100 00000 ..... 100 ..... 0111011 @r2 779 packw 0000100 ..... ..... 100 ..... 0111011 @r 780 } 781 # *** RV64 extra Zbb Standard Extension (in addition to RV32 Zbb) *** 782 clzw 0110000 00000 ..... 001 ..... 0011011 @r2 783 ctzw 0110000 00001 ..... 001 ..... 0011011 @r2 784 cpopw 0110000 00010 ..... 001 ..... 0011011 @r2 785 786 # *** RV32 Zbc/Zbkc Standard Extension *** 787 clmul 0000101 .......... 001 ..... 0110011 @r 788 clmulh 0000101 .......... 011 ..... 0110011 @r 789 # *** RV32 extra Zbc Standard Extension *** 790 clmulr 0000101 .......... 010 ..... 0110011 @r 791 792 # *** RV32 Zbkx Standard Extension *** 793 xperm4 0010100 .......... 010 ..... 0110011 @r 794 xperm8 0010100 .......... 100 ..... 0110011 @r 795 796 # *** RV32 Zbs Standard Extension *** 797 bclr 0100100 .......... 001 ..... 0110011 @r 798 bclri 01001. ........... 001 ..... 0010011 @sh 799 bext 0100100 .......... 101 ..... 0110011 @r 800 bexti 01001. ........... 101 ..... 0010011 @sh 801 binv 0110100 .......... 001 ..... 0110011 @r 802 binvi 01101. ........... 001 ..... 0010011 @sh 803 bset 0010100 .......... 001 ..... 0110011 @r 804 bseti 00101. ........... 001 ..... 0010011 @sh 805 806 # *** RV32 Zfh Extension *** 807 flh ............ ..... 001 ..... 0000111 @i 808 fsh ....... ..... ..... 001 ..... 0100111 @s 809 fmadd_h ..... 10 ..... ..... ... ..... 1000011 @r4_rm 810 fmsub_h ..... 10 ..... ..... ... ..... 1000111 @r4_rm 811 fnmsub_h ..... 10 ..... ..... ... ..... 1001011 @r4_rm 812 fnmadd_h ..... 10 ..... ..... ... ..... 1001111 @r4_rm 813 fadd_h 0000010 ..... ..... ... ..... 1010011 @r_rm 814 fsub_h 0000110 ..... ..... ... ..... 1010011 @r_rm 815 fmul_h 0001010 ..... ..... ... ..... 1010011 @r_rm 816 fdiv_h 0001110 ..... ..... ... ..... 1010011 @r_rm 817 fsqrt_h 0101110 00000 ..... ... ..... 1010011 @r2_rm 818 fsgnj_h 0010010 ..... ..... 000 ..... 1010011 @r 819 fsgnjn_h 0010010 ..... ..... 001 ..... 1010011 @r 820 fsgnjx_h 0010010 ..... ..... 010 ..... 1010011 @r 821 fmin_h 0010110 ..... ..... 000 ..... 1010011 @r 822 fmax_h 0010110 ..... ..... 001 ..... 1010011 @r 823 fcvt_h_s 0100010 00000 ..... ... ..... 1010011 @r2_rm 824 fcvt_s_h 0100000 00010 ..... ... ..... 1010011 @r2_rm 825 fcvt_h_d 0100010 00001 ..... ... ..... 1010011 @r2_rm 826 fcvt_d_h 0100001 00010 ..... ... ..... 1010011 @r2_rm 827 fcvt_w_h 1100010 00000 ..... ... ..... 1010011 @r2_rm 828 fcvt_wu_h 1100010 00001 ..... ... ..... 1010011 @r2_rm 829 fmv_x_h 1110010 00000 ..... 000 ..... 1010011 @r2 830 feq_h 1010010 ..... ..... 010 ..... 1010011 @r 831 flt_h 1010010 ..... ..... 001 ..... 1010011 @r 832 fle_h 1010010 ..... ..... 000 ..... 1010011 @r 833 fclass_h 1110010 00000 ..... 001 ..... 1010011 @r2 834 fcvt_h_w 1101010 00000 ..... ... ..... 1010011 @r2_rm 835 fcvt_h_wu 1101010 00001 ..... ... ..... 1010011 @r2_rm 836 fmv_h_x 1111010 00000 ..... 000 ..... 1010011 @r2 837 838 # *** RV64 Zfh Extension (in addition to RV32 Zfh) *** 839 fcvt_l_h 1100010 00010 ..... ... ..... 1010011 @r2_rm 840 fcvt_lu_h 1100010 00011 ..... ... ..... 1010011 @r2_rm 841 fcvt_h_l 1101010 00010 ..... ... ..... 1010011 @r2_rm 842 fcvt_h_lu 1101010 00011 ..... ... ..... 1010011 @r2_rm 843 844 # *** Svinval Standard Extension *** 845 sinval_vma 0001011 ..... ..... 000 00000 1110011 @sfence_vma 846 sfence_w_inval 0001100 00000 00000 000 00000 1110011 847 sfence_inval_ir 0001100 00001 00000 000 00000 1110011 848 hinval_vvma 0010011 ..... ..... 000 00000 1110011 @hfence_vvma 849 hinval_gvma 0110011 ..... ..... 000 00000 1110011 @hfence_gvma 850 851 # *** RV32 Zknd Standard Extension *** 852 aes32dsmi .. 10111 ..... ..... 000 ..... 0110011 @k_aes 853 aes32dsi .. 10101 ..... ..... 000 ..... 0110011 @k_aes 854 # *** RV64 Zknd Standard Extension *** 855 aes64dsm 00 11111 ..... ..... 000 ..... 0110011 @r 856 aes64ds 00 11101 ..... ..... 000 ..... 0110011 @r 857 aes64im 00 11000 00000 ..... 001 ..... 0010011 @r2 858 # *** RV32 Zkne Standard Extension *** 859 aes32esmi .. 10011 ..... ..... 000 ..... 0110011 @k_aes 860 aes32esi .. 10001 ..... ..... 000 ..... 0110011 @k_aes 861 # *** RV64 Zkne Standard Extension *** 862 aes64es 00 11001 ..... ..... 000 ..... 0110011 @r 863 aes64esm 00 11011 ..... ..... 000 ..... 0110011 @r 864 # *** RV64 Zkne/zknd Standard Extension *** 865 aes64ks2 01 11111 ..... ..... 000 ..... 0110011 @r 866 aes64ks1i 00 11000 1.... ..... 001 ..... 0010011 @i_aes 867 # *** RV32 Zknh Standard Extension *** 868 sha256sig0 00 01000 00010 ..... 001 ..... 0010011 @r2 869 sha256sig1 00 01000 00011 ..... 001 ..... 0010011 @r2 870 sha256sum0 00 01000 00000 ..... 001 ..... 0010011 @r2 871 sha256sum1 00 01000 00001 ..... 001 ..... 0010011 @r2 872 sha512sum0r 01 01000 ..... ..... 000 ..... 0110011 @r 873 sha512sum1r 01 01001 ..... ..... 000 ..... 0110011 @r 874 sha512sig0l 01 01010 ..... ..... 000 ..... 0110011 @r 875 sha512sig0h 01 01110 ..... ..... 000 ..... 0110011 @r 876 sha512sig1l 01 01011 ..... ..... 000 ..... 0110011 @r 877 sha512sig1h 01 01111 ..... ..... 000 ..... 0110011 @r 878 # *** RV64 Zknh Standard Extension *** 879 sha512sig0 00 01000 00110 ..... 001 ..... 0010011 @r2 880 sha512sig1 00 01000 00111 ..... 001 ..... 0010011 @r2 881 sha512sum0 00 01000 00100 ..... 001 ..... 0010011 @r2 882 sha512sum1 00 01000 00101 ..... 001 ..... 0010011 @r2 883 # *** RV32 Zksh Standard Extension *** 884 sm3p0 00 01000 01000 ..... 001 ..... 0010011 @r2 885 sm3p1 00 01000 01001 ..... 001 ..... 0010011 @r2 886 # *** RV32 Zksed Standard Extension *** 887 sm4ed .. 11000 ..... ..... 000 ..... 0110011 @k_aes 888 sm4ks .. 11010 ..... ..... 000 ..... 0110011 @k_aes