qemu

FORK: QEMU emulator
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insn64.decode (14216B)


      1 #
      2 # Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1)
      3 #
      4 # Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
      5 #
      6 # This library is free software; you can redistribute it and/or
      7 # modify it under the terms of the GNU Lesser General Public
      8 # License as published by the Free Software Foundation; either
      9 # version 2.1 of the License, or (at your option) any later version.
     10 #
     11 # This library is distributed in the hope that it will be useful,
     12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 # Lesser General Public License for more details.
     15 #
     16 # You should have received a copy of the GNU Lesser General Public
     17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
     18 #
     19 
     20 # Format MLS:D and 8LS:D
     21 &PLS_D          rt ra si:int64_t r:bool
     22 %pls_si         32:s18 0:16
     23 @PLS_D          ...... .. ... r:1 .. .................. \
     24                 ...... rt:5 ra:5 ................       \
     25                 &PLS_D si=%pls_si
     26 @8LS_D_TSX      ...... .. . .. r:1 .. .................. \
     27                 ..... rt:6 ra:5 ................         \
     28                 &PLS_D si=%pls_si
     29 
     30 %rt_tsxp        21:1 22:4 !function=times_2
     31 @8LS_D_TSXP     ...... .. . .. r:1 .. .................. \
     32                 ...... ..... ra:5 ................       \
     33                 &PLS_D si=%pls_si rt=%rt_tsxp
     34 
     35 @8LS_D          ...... .. . .. r:1 .. .................. \
     36                 ...... rt:5 ra:5 ................        \
     37                 &PLS_D si=%pls_si
     38 
     39 # Format 8RR:D
     40 %8rr_si         32:s16 0:16
     41 %8rr_xt         16:1 21:5
     42 &8RR_D_IX       xt ix si
     43 @8RR_D_IX       ...... .. .... .. .. ................ \
     44                 ...... ..... ... ix:1 . ................ \
     45                 &8RR_D_IX si=%8rr_si xt=%8rr_xt
     46 &8RR_D          xt si:int32_t
     47 @8RR_D          ...... .. .... .. .. ................ \
     48                 ...... ..... ....  . ................ \
     49                 &8RR_D si=%8rr_si xt=%8rr_xt
     50 
     51 # Format 8RR:XX4
     52 %8rr_xx_xt      0:1 21:5
     53 %8rr_xx_xa      2:1 16:5
     54 %8rr_xx_xb      1:1 11:5
     55 %8rr_xx_xc      3:1  6:5
     56 &8RR_XX4        xt xa xb xc
     57 @8RR_XX4        ........ ........ ........ ........ \
     58                 ...... ..... ..... ..... ..... .. .... \
     59                 &8RR_XX4 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc
     60 
     61 &8RR_XX4_imm    xt xa xb xc imm
     62 @8RR_XX4_imm    ........ ........ ........ imm:8 \
     63                 ...... ..... ..... ..... ..... .. .... \
     64                 &8RR_XX4_imm xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc
     65 
     66 &8RR_XX4_uim3   xt xa xb xc uim3
     67 @8RR_XX4_uim3   ...... .. .... .. ............... uim3:3 \
     68                 ...... ..... ..... ..... ..... .. ....   \
     69                 &8RR_XX4_uim3 xt=%8rr_xx_xt xa=%8rr_xx_xa xb=%8rr_xx_xb xc=%8rr_xx_xc
     70 
     71 # Format MMIRR:XX3
     72 &MMIRR_XX3      !extern xa xb xt pmsk xmsk ymsk
     73 %xx3_xa         2:1 16:5
     74 %xx3_xb         1:1 11:5
     75 %xx3_at         23:3
     76 %xx3_xa_pair    2:1 17:4 !function=times_2
     77 @MMIRR_XX3      ...... .. .... .. . . ........ xmsk:4 ymsk:4  \
     78                 ...... ... .. ..... ..... ........ ...  \
     79                 &MMIRR_XX3 xa=%xx3_xa xb=%xx3_xb xt=%xx3_at
     80 
     81 @MMIRR_XX3_NO_P ...... .. .... .. . . ........ xmsk:4 .... \
     82                 ...... ... .. ..... ..... ........ ... \
     83                 &MMIRR_XX3 xb=%xx3_xb xt=%xx3_at pmsk=1
     84 
     85 ### Fixed-Point Load Instructions
     86 
     87 PLBZ            000001 10 0--.-- .................. \
     88                 100010 ..... ..... ................     @PLS_D
     89 PLHZ            000001 10 0--.-- .................. \
     90                 101000 ..... ..... ................     @PLS_D
     91 PLHA            000001 10 0--.-- .................. \
     92                 101010 ..... ..... ................     @PLS_D
     93 PLWZ            000001 10 0--.-- .................. \
     94                 100000 ..... ..... ................     @PLS_D
     95 PLWA            000001 00 0--.-- .................. \
     96                 101001 ..... ..... ................     @PLS_D
     97 PLD             000001 00 0--.-- .................. \
     98                 111001 ..... ..... ................     @PLS_D
     99 PLQ             000001 00 0--.-- .................. \
    100                 111000 ..... ..... ................     @PLS_D
    101 
    102 ### Fixed-Point Store Instructions
    103 
    104 PSTW            000001 10 0--.-- .................. \
    105                 100100 ..... ..... ................     @PLS_D
    106 PSTB            000001 10 0--.-- .................. \
    107                 100110 ..... ..... ................     @PLS_D
    108 PSTH            000001 10 0--.-- .................. \
    109                 101100 ..... ..... ................     @PLS_D
    110 
    111 PSTD            000001 00 0--.-- .................. \
    112                 111101 ..... ..... ................     @PLS_D
    113 PSTQ            000001 00 0--.-- .................. \
    114                 111100 ..... ..... ................     @PLS_D
    115 
    116 ### Fixed-Point Arithmetic Instructions
    117 
    118 PADDI           000001 10 0--.-- ..................     \
    119                 001110 ..... ..... ................     @PLS_D
    120 
    121 ### Float-Point Load and Store Instructions
    122 
    123 PLFS            000001 10 0--.-- .................. \
    124                 110000 ..... ..... ................     @PLS_D
    125 PLFD            000001 10 0--.-- .................. \
    126                 110010 ..... ..... ................     @PLS_D
    127 PSTFS           000001 10 0--.-- .................. \
    128                 110100 ..... ..... ................     @PLS_D
    129 PSTFD           000001 10 0--.-- .................. \
    130                 110110 ..... ..... ................     @PLS_D
    131 
    132 ## VSX GER instruction
    133 
    134 PMXVI4GER8      000001 11 1001 -- - - pmsk:8 ........              \
    135                 111011 ... -- ..... ..... 00100011 ..-  @MMIRR_XX3
    136 PMXVI4GER8PP    000001 11 1001 -- - - pmsk:8 ........              \
    137                 111011 ... -- ..... ..... 00100010 ..-  @MMIRR_XX3
    138 PMXVI8GER4      000001 11 1001 -- - - pmsk:4 ---- ........         \
    139                 111011 ... -- ..... ..... 00000011 ..-  @MMIRR_XX3
    140 PMXVI8GER4PP    000001 11 1001 -- - - pmsk:4 ---- ........         \
    141                 111011 ... -- ..... ..... 00000010 ..-  @MMIRR_XX3
    142 PMXVI16GER2     000001 11 1001 -- - - pmsk:2 ------ ........       \
    143                 111011 ... -- ..... ..... 01001011 ..-  @MMIRR_XX3
    144 PMXVI16GER2PP   000001 11 1001 -- - - pmsk:2 ------ ........       \
    145                 111011 ... -- ..... ..... 01101011 ..-  @MMIRR_XX3
    146 PMXVI8GER4SPP   000001 11 1001 -- - - pmsk:4 ---- ........         \
    147                 111011 ... -- ..... ..... 01100011 ..-  @MMIRR_XX3
    148 PMXVI16GER2S    000001 11 1001 -- - - pmsk:2 ------ ........       \
    149                 111011 ... -- ..... ..... 00101011 ..-  @MMIRR_XX3
    150 PMXVI16GER2SPP  000001 11 1001 -- - - pmsk:2 ------ ........       \
    151                 111011 ... -- ..... ..... 00101010 ..-  @MMIRR_XX3
    152 
    153 PMXVBF16GER2    000001 11 1001 -- - - pmsk:2 ------ ........ \
    154                 111011 ... -- ..... ..... 00110011 ..-  @MMIRR_XX3
    155 PMXVBF16GER2PP  000001 11 1001 -- - - pmsk:2 ------ ........ \
    156                 111011 ... -- ..... ..... 00110010 ..-  @MMIRR_XX3
    157 PMXVBF16GER2PN  000001 11 1001 -- - - pmsk:2 ------ ........ \
    158                 111011 ... -- ..... ..... 10110010 ..-  @MMIRR_XX3
    159 PMXVBF16GER2NP  000001 11 1001 -- - - pmsk:2 ------ ........ \
    160                 111011 ... -- ..... ..... 01110010 ..-  @MMIRR_XX3
    161 PMXVBF16GER2NN  000001 11 1001 -- - - pmsk:2 ------ ........ \
    162                 111011 ... -- ..... ..... 11110010 ..-  @MMIRR_XX3
    163 
    164 PMXVF16GER2     000001 11 1001 -- - - pmsk:2 ------ ........ \
    165                 111011 ... -- ..... ..... 00010011 ..-  @MMIRR_XX3
    166 PMXVF16GER2PP   000001 11 1001 -- - - pmsk:2 ------ ........ \
    167                 111011 ... -- ..... ..... 00010010 ..-  @MMIRR_XX3
    168 PMXVF16GER2PN   000001 11 1001 -- - - pmsk:2 ------ ........ \
    169                 111011 ... -- ..... ..... 10010010 ..-  @MMIRR_XX3
    170 PMXVF16GER2NP   000001 11 1001 -- - - pmsk:2 ------ ........ \
    171                 111011 ... -- ..... ..... 01010010 ..-  @MMIRR_XX3
    172 PMXVF16GER2NN   000001 11 1001 -- - - pmsk:2 ------ ........ \
    173                 111011 ... -- ..... ..... 11010010 ..-  @MMIRR_XX3
    174 
    175 PMXVF32GER      000001 11 1001 -- - - -------- .... ymsk:4 \
    176                 111011 ... -- ..... ..... 00011011 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa
    177 PMXVF32GERPP    000001 11 1001 -- - - -------- .... ymsk:4 \
    178                 111011 ... -- ..... ..... 00011010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa
    179 PMXVF32GERPN    000001 11 1001 -- - - -------- .... ymsk:4 \
    180                 111011 ... -- ..... ..... 10011010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa
    181 PMXVF32GERNP    000001 11 1001 -- - - -------- .... ymsk:4 \
    182                 111011 ... -- ..... ..... 01011010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa
    183 PMXVF32GERNN    000001 11 1001 -- - - -------- .... ymsk:4 \
    184                 111011 ... -- ..... ..... 11011010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa
    185 
    186 PMXVF64GER      000001 11 1001 -- - - -------- .... ymsk:2 -- \
    187                 111011 ... -- ....0 ..... 00111011 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa_pair
    188 PMXVF64GERPP    000001 11 1001 -- - - -------- .... ymsk:2 -- \
    189                 111011 ... -- ....0 ..... 00111010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa_pair
    190 PMXVF64GERPN    000001 11 1001 -- - - -------- .... ymsk:2 -- \
    191                 111011 ... -- ....0 ..... 10111010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa_pair
    192 PMXVF64GERNP    000001 11 1001 -- - - -------- .... ymsk:2 -- \
    193                 111011 ... -- ....0 ..... 01111010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa_pair
    194 PMXVF64GERNN    000001 11 1001 -- - - -------- .... ymsk:2 -- \
    195                 111011 ... -- ....0 ..... 11111010 ..-  @MMIRR_XX3_NO_P xa=%xx3_xa_pair
    196 
    197 ### Prefixed No-operation Instruction
    198 
    199 @PNOP           000001 11 0000-- 000000000000000000     \
    200                 ................................
    201 
    202 {
    203   [
    204     ## Invalid suffixes: Branch instruction
    205     # bc[l][a]
    206     INVALID     ................................        \
    207                 010000--------------------------        @PNOP
    208     # b[l][a]
    209     INVALID     ................................        \
    210                 010010--------------------------        @PNOP
    211     # bclr[l]
    212     INVALID     ................................        \
    213                 010011---------------0000010000-        @PNOP
    214     # bcctr[l]
    215     INVALID     ................................        \
    216                 010011---------------1000010000-        @PNOP
    217     # bctar[l]
    218     INVALID     ................................        \
    219                 010011---------------1000110000-        @PNOP
    220 
    221     ## Invalid suffixes: rfebb
    222     INVALID     ................................        \
    223                 010011---------------0010010010-        @PNOP
    224 
    225     ## Invalid suffixes: context synchronizing other than isync
    226     # sc
    227     INVALID     ................................        \
    228                 010001------------------------1-        @PNOP
    229     # scv
    230     INVALID     ................................        \
    231                 010001------------------------01        @PNOP
    232     # rfscv
    233     INVALID     ................................        \
    234                 010011---------------0001010010-        @PNOP
    235     # rfid
    236     INVALID     ................................        \
    237                 010011---------------0000010010-        @PNOP
    238     # hrfid
    239     INVALID     ................................        \
    240                 010011---------------0100010010-        @PNOP
    241     # urfid
    242     INVALID     ................................        \
    243                 010011---------------0100110010-        @PNOP
    244     # stop
    245     INVALID     ................................        \
    246                 010011---------------0101110010-        @PNOP
    247     # mtmsr w/ L=0
    248     INVALID     ................................        \
    249                 011111---------0-----0010010010-        @PNOP
    250     # mtmsrd w/ L=0
    251     INVALID     ................................        \
    252                 011111---------0-----0010110010-        @PNOP
    253 
    254     ## Invalid suffixes: Service Processor Attention
    255     INVALID     ................................        \
    256                 000000----------------100000000-        @PNOP
    257   ]
    258 
    259   ## Valid suffixes
    260   PNOP          ................................        \
    261                 --------------------------------        @PNOP
    262 }
    263 
    264 ### VSX instructions
    265 
    266 PLXSD           000001 00 0--.-- .................. \
    267                 101010 ..... ..... ................     @8LS_D
    268 
    269 PSTXSD          000001 00 0--.-- .................. \
    270                 101110 ..... ..... ................     @8LS_D
    271 
    272 PLXSSP          000001 00 0--.-- .................. \
    273                 101011 ..... ..... ................     @8LS_D
    274 
    275 PSTXSSP         000001 00 0--.-- .................. \
    276                 101111 ..... ..... ................     @8LS_D
    277 
    278 PLXV            000001 00 0--.-- .................. \
    279                 11001 ...... ..... ................     @8LS_D_TSX
    280 PSTXV           000001 00 0--.-- .................. \
    281                 11011 ...... ..... ................     @8LS_D_TSX
    282 PLXVP           000001 00 0--.-- .................. \
    283                 111010 ..... ..... ................     @8LS_D_TSXP
    284 PSTXVP          000001 00 0--.-- .................. \
    285                 111110 ..... ..... ................     @8LS_D_TSXP
    286 
    287 XXEVAL          000001 01 0000 -- ---------- ........ \
    288                 100010 ..... ..... ..... ..... 01 ....  @8RR_XX4_imm
    289 
    290 XXSPLTIDP       000001 01 0000 -- -- ................ \
    291                 100000 ..... 0010 . ................    @8RR_D
    292 XXSPLTIW        000001 01 0000 -- -- ................ \
    293                 100000 ..... 0011 . ................    @8RR_D
    294 XXSPLTI32DX     000001 01 0000 -- -- ................ \
    295                 100000 ..... 000 .. ................    @8RR_D_IX
    296 
    297 XXBLENDVD       000001 01 0000 -- ------------------ \
    298                 100001 ..... ..... ..... ..... 11 ....  @8RR_XX4
    299 XXBLENDVW       000001 01 0000 -- ------------------ \
    300                 100001 ..... ..... ..... ..... 10 ....  @8RR_XX4
    301 XXBLENDVH       000001 01 0000 -- ------------------ \
    302                 100001 ..... ..... ..... ..... 01 ....  @8RR_XX4
    303 XXBLENDVB       000001 01 0000 -- ------------------ \
    304                 100001 ..... ..... ..... ..... 00 ....  @8RR_XX4
    305 
    306 XXPERMX         000001 01 0000 -- --------------- ... \
    307                 100010 ..... ..... ..... ..... 00 ....  @8RR_XX4_uim3