fpu_helper.c (5698B)
1 /* 2 * OpenRISC float helper routines 3 * 4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com> 5 * Feng Gao <gf91597@gmail.com> 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "cpu.h" 23 #include "exec/helper-proto.h" 24 #include "exception.h" 25 #include "fpu/softfloat.h" 26 27 static int ieee_ex_to_openrisc(int fexcp) 28 { 29 int ret = 0; 30 if (fexcp & float_flag_invalid) { 31 ret |= FPCSR_IVF; 32 } 33 if (fexcp & float_flag_overflow) { 34 ret |= FPCSR_OVF; 35 } 36 if (fexcp & float_flag_underflow) { 37 ret |= FPCSR_UNF; 38 } 39 if (fexcp & float_flag_divbyzero) { 40 ret |= FPCSR_DZF; 41 } 42 if (fexcp & float_flag_inexact) { 43 ret |= FPCSR_IXF; 44 } 45 return ret; 46 } 47 48 void HELPER(update_fpcsr)(CPUOpenRISCState *env) 49 { 50 int tmp = get_float_exception_flags(&env->fp_status); 51 52 if (tmp) { 53 set_float_exception_flags(0, &env->fp_status); 54 tmp = ieee_ex_to_openrisc(tmp); 55 if (tmp) { 56 env->fpcsr |= tmp; 57 if (env->fpcsr & FPCSR_FPEE) { 58 helper_exception(env, EXCP_FPE); 59 } 60 } 61 } 62 } 63 64 void cpu_set_fpcsr(CPUOpenRISCState *env, uint32_t val) 65 { 66 static const int rm_to_sf[] = { 67 float_round_nearest_even, 68 float_round_to_zero, 69 float_round_up, 70 float_round_down 71 }; 72 73 env->fpcsr = val & 0xfff; 74 set_float_rounding_mode(rm_to_sf[extract32(val, 1, 2)], &env->fp_status); 75 } 76 77 uint64_t HELPER(itofd)(CPUOpenRISCState *env, uint64_t val) 78 { 79 return int64_to_float64(val, &env->fp_status); 80 } 81 82 uint32_t HELPER(itofs)(CPUOpenRISCState *env, uint32_t val) 83 { 84 return int32_to_float32(val, &env->fp_status); 85 } 86 87 uint64_t HELPER(ftoid)(CPUOpenRISCState *env, uint64_t val) 88 { 89 return float64_to_int64_round_to_zero(val, &env->fp_status); 90 } 91 92 uint32_t HELPER(ftois)(CPUOpenRISCState *env, uint32_t val) 93 { 94 return float32_to_int32_round_to_zero(val, &env->fp_status); 95 } 96 97 uint64_t HELPER(stod)(CPUOpenRISCState *env, uint32_t val) 98 { 99 return float32_to_float64(val, &env->fp_status); 100 } 101 102 uint32_t HELPER(dtos)(CPUOpenRISCState *env, uint64_t val) 103 { 104 return float64_to_float32(val, &env->fp_status); 105 } 106 107 #define FLOAT_CALC(name) \ 108 uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \ 109 uint64_t fdt0, uint64_t fdt1) \ 110 { return float64_ ## name(fdt0, fdt1, &env->fp_status); } \ 111 uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \ 112 uint32_t fdt0, uint32_t fdt1) \ 113 { return float32_ ## name(fdt0, fdt1, &env->fp_status); } 114 115 FLOAT_CALC(add) 116 FLOAT_CALC(sub) 117 FLOAT_CALC(mul) 118 FLOAT_CALC(div) 119 FLOAT_CALC(rem) 120 #undef FLOAT_CALC 121 122 123 uint64_t helper_float_madd_d(CPUOpenRISCState *env, uint64_t a, 124 uint64_t b, uint64_t c) 125 { 126 /* Note that or1ksim doesn't use fused operation. */ 127 b = float64_mul(b, c, &env->fp_status); 128 return float64_add(a, b, &env->fp_status); 129 } 130 131 uint32_t helper_float_madd_s(CPUOpenRISCState *env, uint32_t a, 132 uint32_t b, uint32_t c) 133 { 134 /* Note that or1ksim doesn't use fused operation. */ 135 b = float32_mul(b, c, &env->fp_status); 136 return float32_add(a, b, &env->fp_status); 137 } 138 139 140 #define FLOAT_CMP(name, impl) \ 141 target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \ 142 uint64_t fdt0, uint64_t fdt1) \ 143 { return float64_ ## impl(fdt0, fdt1, &env->fp_status); } \ 144 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \ 145 uint32_t fdt0, uint32_t fdt1) \ 146 { return float32_ ## impl(fdt0, fdt1, &env->fp_status); } 147 148 FLOAT_CMP(le, le) 149 FLOAT_CMP(lt, lt) 150 FLOAT_CMP(eq, eq_quiet) 151 FLOAT_CMP(un, unordered_quiet) 152 #undef FLOAT_CMP 153 154 #define FLOAT_UCMP(name, expr) \ 155 target_ulong helper_float_ ## name ## _d(CPUOpenRISCState *env, \ 156 uint64_t fdt0, uint64_t fdt1) \ 157 { \ 158 FloatRelation r = float64_compare_quiet(fdt0, fdt1, &env->fp_status); \ 159 return expr; \ 160 } \ 161 target_ulong helper_float_ ## name ## _s(CPUOpenRISCState *env, \ 162 uint32_t fdt0, uint32_t fdt1) \ 163 { \ 164 FloatRelation r = float32_compare_quiet(fdt0, fdt1, &env->fp_status); \ 165 return expr; \ 166 } 167 168 FLOAT_UCMP(ueq, r == float_relation_equal || r == float_relation_unordered) 169 FLOAT_UCMP(ult, r == float_relation_less || r == float_relation_unordered) 170 FLOAT_UCMP(ule, r != float_relation_greater) 171 #undef FLOAT_UCMP