trans_fcmp.c.inc (1524B)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2021 Loongson Technology Corporation Limited 4 */ 5 6 /* bit0(signaling/quiet) bit1(lt) bit2(eq) bit3(un) bit4(neq) */ 7 static uint32_t get_fcmp_flags(int cond) 8 { 9 uint32_t flags = 0; 10 11 if (cond & 0x1) { 12 flags |= FCMP_LT; 13 } 14 if (cond & 0x2) { 15 flags |= FCMP_EQ; 16 } 17 if (cond & 0x4) { 18 flags |= FCMP_UN; 19 } 20 if (cond & 0x8) { 21 flags |= FCMP_GT | FCMP_LT; 22 } 23 return flags; 24 } 25 26 static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a) 27 { 28 TCGv var; 29 uint32_t flags; 30 void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32); 31 32 CHECK_FPE; 33 34 var = tcg_temp_new(); 35 fn = (a->fcond & 1 ? gen_helper_fcmp_s_s : gen_helper_fcmp_c_s); 36 flags = get_fcmp_flags(a->fcond >> 1); 37 38 fn(var, cpu_env, cpu_fpr[a->fj], cpu_fpr[a->fk], tcg_constant_i32(flags)); 39 40 tcg_gen_st8_tl(var, cpu_env, offsetof(CPULoongArchState, cf[a->cd])); 41 tcg_temp_free(var); 42 return true; 43 } 44 45 static bool trans_fcmp_cond_d(DisasContext *ctx, arg_fcmp_cond_d *a) 46 { 47 TCGv var; 48 uint32_t flags; 49 void (*fn)(TCGv, TCGv_env, TCGv, TCGv, TCGv_i32); 50 51 CHECK_FPE; 52 53 var = tcg_temp_new(); 54 fn = (a->fcond & 1 ? gen_helper_fcmp_s_d : gen_helper_fcmp_c_d); 55 flags = get_fcmp_flags(a->fcond >> 1); 56 57 fn(var, cpu_env, cpu_fpr[a->fj], cpu_fpr[a->fk], tcg_constant_i32(flags)); 58 59 tcg_gen_st8_tl(var, cpu_env, offsetof(CPULoongArchState, cf[a->cd])); 60 61 tcg_temp_free(var); 62 return true; 63 }