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vmcs.h (12706B)


      1 /*-
      2  * Copyright (c) 2011 NetApp, Inc.
      3  * All rights reserved.
      4  *
      5  * Redistribution and use in source and binary forms, with or without
      6  * modification, are permitted provided that the following conditions
      7  * are met:
      8  * 1. Redistributions of source code must retain the above copyright
      9  *    notice, this list of conditions and the following disclaimer.
     10  * 2. Redistributions in binary form must reproduce the above copyright
     11  *    notice, this list of conditions and the following disclaimer in the
     12  *    documentation and/or other materials provided with the distribution.
     13  *
     14  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
     15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     17  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
     18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     24  * SUCH DAMAGE.
     25  *
     26  * $FreeBSD$
     27  */
     28 
     29 #ifndef VMCS_H
     30 #define VMCS_H
     31 
     32 #include <Hypervisor/hv.h>
     33 #include <Hypervisor/hv_vmx.h>
     34 
     35 #define VMCS_INITIAL 0xffffffffffffffff
     36 
     37 #define VMCS_IDENT(encoding) ((encoding) | 0x80000000)
     38 /*
     39  * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B.
     40  */
     41 #define VMCS_INVALID_ENCODING 0xffffffff
     42 
     43 /* 16-bit control fields */
     44 #define VMCS_VPID 0x00000000
     45 #define VMCS_PIR_VECTOR 0x00000002
     46 
     47 /* 16-bit guest-state fields */
     48 #define VMCS_GUEST_ES_SELECTOR 0x00000800
     49 #define VMCS_GUEST_CS_SELECTOR 0x00000802
     50 #define VMCS_GUEST_SS_SELECTOR 0x00000804
     51 #define VMCS_GUEST_DS_SELECTOR 0x00000806
     52 #define VMCS_GUEST_FS_SELECTOR 0x00000808
     53 #define VMCS_GUEST_GS_SELECTOR 0x0000080A
     54 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C
     55 #define VMCS_GUEST_TR_SELECTOR 0x0000080E
     56 #define VMCS_GUEST_INTR_STATUS 0x00000810
     57 
     58 /* 16-bit host-state fields */
     59 #define VMCS_HOST_ES_SELECTOR 0x00000C00
     60 #define VMCS_HOST_CS_SELECTOR 0x00000C02
     61 #define VMCS_HOST_SS_SELECTOR 0x00000C04
     62 #define VMCS_HOST_DS_SELECTOR 0x00000C06
     63 #define VMCS_HOST_FS_SELECTOR 0x00000C08
     64 #define VMCS_HOST_GS_SELECTOR 0x00000C0A
     65 #define VMCS_HOST_TR_SELECTOR 0x00000C0C
     66 
     67 /* 64-bit control fields */
     68 #define VMCS_IO_BITMAP_A 0x00002000
     69 #define VMCS_IO_BITMAP_B 0x00002002
     70 #define VMCS_MSR_BITMAP 0x00002004
     71 #define VMCS_EXIT_MSR_STORE 0x00002006
     72 #define VMCS_EXIT_MSR_LOAD 0x00002008
     73 #define VMCS_ENTRY_MSR_LOAD 0x0000200A
     74 #define VMCS_EXECUTIVE_VMCS 0x0000200C
     75 #define VMCS_TSC_OFFSET 0x00002010
     76 #define VMCS_VIRTUAL_APIC 0x00002012
     77 #define VMCS_APIC_ACCESS 0x00002014
     78 #define VMCS_PIR_DESC 0x00002016
     79 #define VMCS_EPTP 0x0000201A
     80 #define VMCS_EOI_EXIT0 0x0000201C
     81 #define VMCS_EOI_EXIT1 0x0000201E
     82 #define VMCS_EOI_EXIT2 0x00002020
     83 #define VMCS_EOI_EXIT3 0x00002022
     84 #define VMCS_EOI_EXIT(vector) (VMCS_EOI_EXIT0 + ((vector) / 64) * 2)
     85 
     86 /* 64-bit read-only fields */
     87 #define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400
     88 
     89 /* 64-bit guest-state fields */
     90 #define VMCS_LINK_POINTER 0x00002800
     91 #define VMCS_GUEST_IA32_DEBUGCTL 0x00002802
     92 #define VMCS_GUEST_IA32_PAT 0x00002804
     93 #define VMCS_GUEST_IA32_EFER 0x00002806
     94 #define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808
     95 #define VMCS_GUEST_PDPTE0 0x0000280A
     96 #define VMCS_GUEST_PDPTE1 0x0000280C
     97 #define VMCS_GUEST_PDPTE2 0x0000280E
     98 #define VMCS_GUEST_PDPTE3 0x00002810
     99 
    100 /* 64-bit host-state fields */
    101 #define VMCS_HOST_IA32_PAT 0x00002C00
    102 #define VMCS_HOST_IA32_EFER 0x00002C02
    103 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04
    104 
    105 /* 32-bit control fields */
    106 #define VMCS_PIN_BASED_CTLS 0x00004000
    107 #define VMCS_PRI_PROC_BASED_CTLS 0x00004002
    108 #define VMCS_EXCEPTION_BITMAP 0x00004004
    109 #define VMCS_PF_ERROR_MASK 0x00004006
    110 #define VMCS_PF_ERROR_MATCH 0x00004008
    111 #define VMCS_CR3_TARGET_COUNT 0x0000400A
    112 #define VMCS_EXIT_CTLS 0x0000400C
    113 #define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E
    114 #define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010
    115 #define VMCS_ENTRY_CTLS 0x00004012
    116 #define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014
    117 #define VMCS_ENTRY_INTR_INFO 0x00004016
    118 #define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018
    119 #define VMCS_ENTRY_INST_LENGTH 0x0000401A
    120 #define VMCS_TPR_THRESHOLD 0x0000401C
    121 #define VMCS_SEC_PROC_BASED_CTLS 0x0000401E
    122 #define VMCS_PLE_GAP 0x00004020
    123 #define VMCS_PLE_WINDOW 0x00004022
    124 
    125 /* 32-bit read-only data fields */
    126 #define VMCS_INSTRUCTION_ERROR 0x00004400
    127 #define VMCS_EXIT_REASON 0x00004402
    128 #define VMCS_EXIT_INTR_INFO 0x00004404
    129 #define VMCS_EXIT_INTR_ERRCODE 0x00004406
    130 #define VMCS_IDT_VECTORING_INFO 0x00004408
    131 #define VMCS_IDT_VECTORING_ERROR 0x0000440A
    132 #define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C
    133 #define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E
    134 
    135 /* 32-bit guest-state fields */
    136 #define VMCS_GUEST_ES_LIMIT 0x00004800
    137 #define VMCS_GUEST_CS_LIMIT 0x00004802
    138 #define VMCS_GUEST_SS_LIMIT 0x00004804
    139 #define VMCS_GUEST_DS_LIMIT 0x00004806
    140 #define VMCS_GUEST_FS_LIMIT 0x00004808
    141 #define VMCS_GUEST_GS_LIMIT 0x0000480A
    142 #define VMCS_GUEST_LDTR_LIMIT 0x0000480C
    143 #define VMCS_GUEST_TR_LIMIT 0x0000480E
    144 #define VMCS_GUEST_GDTR_LIMIT 0x00004810
    145 #define VMCS_GUEST_IDTR_LIMIT 0x00004812
    146 #define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814
    147 #define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816
    148 #define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818
    149 #define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A
    150 #define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C
    151 #define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E
    152 #define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820
    153 #define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822
    154 #define VMCS_GUEST_INTERRUPTIBILITY 0x00004824
    155 #define VMCS_GUEST_ACTIVITY 0x00004826
    156 #define VMCS_GUEST_SMBASE 0x00004828
    157 #define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A
    158 #define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E
    159 
    160 /* 32-bit host state fields */
    161 #define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00
    162 
    163 /* Natural Width control fields */
    164 #define VMCS_CR0_MASK 0x00006000
    165 #define VMCS_CR4_MASK 0x00006002
    166 #define VMCS_CR0_SHADOW 0x00006004
    167 #define VMCS_CR4_SHADOW 0x00006006
    168 #define VMCS_CR3_TARGET0 0x00006008
    169 #define VMCS_CR3_TARGET1 0x0000600A
    170 #define VMCS_CR3_TARGET2 0x0000600C
    171 #define VMCS_CR3_TARGET3 0x0000600E
    172 
    173 /* Natural Width read-only fields */
    174 #define VMCS_EXIT_QUALIFICATION 0x00006400
    175 #define VMCS_IO_RCX 0x00006402
    176 #define VMCS_IO_RSI 0x00006404
    177 #define VMCS_IO_RDI 0x00006406
    178 #define VMCS_IO_RIP 0x00006408
    179 #define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A
    180 
    181 /* Natural Width guest-state fields */
    182 #define VMCS_GUEST_CR0 0x00006800
    183 #define VMCS_GUEST_CR3 0x00006802
    184 #define VMCS_GUEST_CR4 0x00006804
    185 #define VMCS_GUEST_ES_BASE 0x00006806
    186 #define VMCS_GUEST_CS_BASE 0x00006808
    187 #define VMCS_GUEST_SS_BASE 0x0000680A
    188 #define VMCS_GUEST_DS_BASE 0x0000680C
    189 #define VMCS_GUEST_FS_BASE 0x0000680E
    190 #define VMCS_GUEST_GS_BASE 0x00006810
    191 #define VMCS_GUEST_LDTR_BASE 0x00006812
    192 #define VMCS_GUEST_TR_BASE 0x00006814
    193 #define VMCS_GUEST_GDTR_BASE 0x00006816
    194 #define VMCS_GUEST_IDTR_BASE 0x00006818
    195 #define VMCS_GUEST_DR7 0x0000681A
    196 #define VMCS_GUEST_RSP 0x0000681C
    197 #define VMCS_GUEST_RIP 0x0000681E
    198 #define VMCS_GUEST_RFLAGS 0x00006820
    199 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822
    200 #define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824
    201 #define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826
    202 
    203 /* Natural Width host-state fields */
    204 #define VMCS_HOST_CR0 0x00006C00
    205 #define VMCS_HOST_CR3 0x00006C02
    206 #define VMCS_HOST_CR4 0x00006C04
    207 #define VMCS_HOST_FS_BASE 0x00006C06
    208 #define VMCS_HOST_GS_BASE 0x00006C08
    209 #define VMCS_HOST_TR_BASE 0x00006C0A
    210 #define VMCS_HOST_GDTR_BASE 0x00006C0C
    211 #define VMCS_HOST_IDTR_BASE 0x00006C0E
    212 #define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10
    213 #define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12
    214 #define VMCS_HOST_RSP 0x00006C14
    215 #define VMCS_HOST_RIP 0x00006c16
    216 
    217 /*
    218  * VM instruction error numbers
    219  */
    220 #define VMRESUME_WITH_NON_LAUNCHED_VMCS 5
    221 
    222 /*
    223  * VMCS exit reasons
    224  */
    225 #define EXIT_REASON_EXCEPTION 0
    226 #define EXIT_REASON_EXT_INTR 1
    227 #define EXIT_REASON_TRIPLE_FAULT 2
    228 #define EXIT_REASON_INIT 3
    229 #define EXIT_REASON_SIPI 4
    230 #define EXIT_REASON_IO_SMI 5
    231 #define EXIT_REASON_SMI 6
    232 #define EXIT_REASON_INTR_WINDOW 7
    233 #define EXIT_REASON_NMI_WINDOW 8
    234 #define EXIT_REASON_TASK_SWITCH 9
    235 #define EXIT_REASON_CPUID 10
    236 #define EXIT_REASON_GETSEC 11
    237 #define EXIT_REASON_HLT 12
    238 #define EXIT_REASON_INVD 13
    239 #define EXIT_REASON_INVLPG 14
    240 #define EXIT_REASON_RDPMC 15
    241 #define EXIT_REASON_RDTSC 16
    242 #define EXIT_REASON_RSM 17
    243 #define EXIT_REASON_VMCALL 18
    244 #define EXIT_REASON_VMCLEAR 19
    245 #define EXIT_REASON_VMLAUNCH 20
    246 #define EXIT_REASON_VMPTRLD 21
    247 #define EXIT_REASON_VMPTRST 22
    248 #define EXIT_REASON_VMREAD 23
    249 #define EXIT_REASON_VMRESUME 24
    250 #define EXIT_REASON_VMWRITE 25
    251 #define EXIT_REASON_VMXOFF 26
    252 #define EXIT_REASON_VMXON 27
    253 #define EXIT_REASON_CR_ACCESS 28
    254 #define EXIT_REASON_DR_ACCESS 29
    255 #define EXIT_REASON_INOUT 30
    256 #define EXIT_REASON_RDMSR 31
    257 #define EXIT_REASON_WRMSR 32
    258 #define EXIT_REASON_INVAL_VMCS 33
    259 #define EXIT_REASON_INVAL_MSR 34
    260 #define EXIT_REASON_MWAIT 36
    261 #define EXIT_REASON_MTF 37
    262 #define EXIT_REASON_MONITOR 39
    263 #define EXIT_REASON_PAUSE 40
    264 #define EXIT_REASON_MCE_DURING_ENTR 41
    265 #define EXIT_REASON_TPR 43
    266 #define EXIT_REASON_APIC_ACCESS 44
    267 #define EXIT_REASON_VIRTUALIZED_EOI 45
    268 #define EXIT_REASON_GDTR_IDTR 46
    269 #define EXIT_REASON_LDTR_TR 47
    270 #define EXIT_REASON_EPT_FAULT 48
    271 #define EXIT_REASON_EPT_MISCONFIG 49
    272 #define EXIT_REASON_INVEPT 50
    273 #define EXIT_REASON_RDTSCP 51
    274 #define EXIT_REASON_VMX_PREEMPT 52
    275 #define EXIT_REASON_INVVPID 53
    276 #define EXIT_REASON_WBINVD 54
    277 #define EXIT_REASON_XSETBV 55
    278 #define EXIT_REASON_APIC_WRITE 56
    279 
    280 /*
    281  * NMI unblocking due to IRET.
    282  *
    283  * Applies to VM-exits due to hardware exception or EPT fault.
    284  */
    285 #define EXIT_QUAL_NMIUDTI (1 << 12)
    286 /*
    287  * VMCS interrupt information fields
    288  */
    289 #define VMCS_INTR_VALID (1U << 31)
    290 #define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */
    291 #define VMCS_INTR_T_HWINTR (0 << 8)
    292 #define VMCS_INTR_T_NMI (2 << 8)
    293 #define VMCS_INTR_T_HWEXCEPTION (3 << 8)
    294 #define VMCS_INTR_T_SWINTR (4 << 8)
    295 #define VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8)
    296 #define VMCS_INTR_T_SWEXCEPTION (6 << 8)
    297 #define VMCS_INTR_DEL_ERRCODE (1 << 11)
    298 
    299 /*
    300  * VMCS IDT-Vectoring information fields
    301  */
    302 #define VMCS_IDT_VEC_VECNUM 0xFF
    303 #define VMCS_IDT_VEC_VALID (1U << 31)
    304 #define VMCS_IDT_VEC_TYPE 0x700
    305 #define VMCS_IDT_VEC_ERRCODE_VALID (1U << 11)
    306 #define VMCS_IDT_VEC_HWINTR (0 << 8)
    307 #define VMCS_IDT_VEC_NMI (2 << 8)
    308 #define VMCS_IDT_VEC_HWEXCEPTION (3 << 8)
    309 #define VMCS_IDT_VEC_SWINTR (4 << 8)
    310 #define VMCS_IDT_VEC_PRIV_SWEXCEPTION (5 << 8)
    311 #define VMCS_IDT_VEC_SWEXCEPTION (6 << 8)
    312 
    313 /*
    314  * VMCS Guest interruptibility field
    315  */
    316 #define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0)
    317 #define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1)
    318 #define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2)
    319 #define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3)
    320 
    321 /*
    322  * Exit qualification for EXIT_REASON_INVAL_VMCS
    323  */
    324 #define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3
    325 
    326 /*
    327  * Exit qualification for EPT violation
    328  */
    329 #define EPT_VIOLATION_DATA_READ (1UL << 0)
    330 #define EPT_VIOLATION_DATA_WRITE (1UL << 1)
    331 #define EPT_VIOLATION_INST_FETCH (1UL << 2)
    332 #define EPT_VIOLATION_GPA_READABLE (1UL << 3)
    333 #define EPT_VIOLATION_GPA_WRITABLE (1UL << 4)
    334 #define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5)
    335 #define EPT_VIOLATION_GLA_VALID (1UL << 7)
    336 #define EPT_VIOLATION_XLAT_VALID (1UL << 8)
    337 
    338 /*
    339  * Exit qualification for APIC-access VM exit
    340  */
    341 #define APIC_ACCESS_OFFSET(qual) ((qual) & 0xFFF)
    342 #define APIC_ACCESS_TYPE(qual) (((qual) >> 12) & 0xF)
    343 
    344 /*
    345  * Exit qualification for APIC-write VM exit
    346  */
    347 #define APIC_WRITE_OFFSET(qual) ((qual) & 0xFFF)
    348 
    349 #define VMCS_PIN_BASED_CTLS_EXTINT            (1 << 0)
    350 #define VMCS_PIN_BASED_CTLS_NMI               (1 << 3)
    351 #define VMCS_PIN_BASED_CTLS_VNMI              (1 << 5)
    352 
    353 #define VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING (1 << 2)
    354 #define VMCS_PRI_PROC_BASED_CTLS_TSC_OFFSET (1 << 3)
    355 #define VMCS_PRI_PROC_BASED_CTLS_HLT (1 << 7)
    356 #define VMCS_PRI_PROC_BASED_CTLS_MWAIT         (1 << 10)
    357 #define VMCS_PRI_PROC_BASED_CTLS_RDTSC         (1 << 12)
    358 #define VMCS_PRI_PROC_BASED_CTLS_CR8_LOAD      (1 << 19)
    359 #define VMCS_PRI_PROC_BASED_CTLS_CR8_STORE     (1 << 20)
    360 #define VMCS_PRI_PROC_BASED_CTLS_TPR_SHADOW    (1 << 21)
    361 #define VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING    (1 << 22)
    362 #define VMCS_PRI_PROC_BASED_CTLS_SEC_CONTROL   (1 << 31)
    363 
    364 #define VMCS_PRI_PROC_BASED2_CTLS_APIC_ACCESSES (1 << 0)
    365 #define VMCS_PRI_PROC_BASED2_CTLS_RDTSCP        (1 << 3)
    366 #define VMCS_PRI_PROC_BASED2_CTLS_X2APIC        (1 << 4)
    367 
    368 enum task_switch_reason {
    369     TSR_CALL,
    370     TSR_IRET,
    371     TSR_JMP,
    372     TSR_IDT_GATE, /* task gate in IDT */
    373 };
    374 
    375 #endif