alu.idef (38693B)
1 /* 2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 /* 19 * ALU Instructions 20 */ 21 22 23 /**********************************************/ 24 /* Add/Sub instructions */ 25 /**********************************************/ 26 27 Q6INSN(A2_add,"Rd32=add(Rs32,Rt32)",ATTRIBS(), 28 "Add 32-bit registers", 29 { RdV=RsV+RtV;}) 30 31 Q6INSN(A2_sub,"Rd32=sub(Rt32,Rs32)",ATTRIBS(), 32 "Subtract 32-bit registers", 33 { RdV=RtV-RsV;}) 34 35 #define COND_ALU(TAG,OPER,DESCR,SEMANTICS)\ 36 Q6INSN(TAG##t,"if (Pu4) "OPER,ATTRIBS(A_ARCHV2),DESCR,{if(fLSBOLD(PuV)){SEMANTICS;} else {CANCEL;}})\ 37 Q6INSN(TAG##f,"if (!Pu4) "OPER,ATTRIBS(A_ARCHV2),DESCR,{if(fLSBOLDNOT(PuV)){SEMANTICS;} else {CANCEL;}})\ 38 Q6INSN(TAG##tnew,"if (Pu4.new) " OPER,ATTRIBS(A_ARCHV2),DESCR,{if(fLSBNEW(PuN)){SEMANTICS;} else {CANCEL;}})\ 39 Q6INSN(TAG##fnew,"if (!Pu4.new) "OPER,ATTRIBS(A_ARCHV2),DESCR,{if(fLSBNEWNOT(PuN)){SEMANTICS;} else {CANCEL;}}) 40 41 COND_ALU(A2_padd,"Rd32=add(Rs32,Rt32)","Conditionally Add 32-bit registers",RdV=RsV+RtV) 42 COND_ALU(A2_psub,"Rd32=sub(Rt32,Rs32)","Conditionally Subtract 32-bit registers",RdV=RtV-RsV) 43 COND_ALU(A2_paddi,"Rd32=add(Rs32,#s8)","Conditionally Add Register and immediate",fIMMEXT(siV); RdV=RsV+siV) 44 COND_ALU(A2_pxor,"Rd32=xor(Rs32,Rt32)","Conditionally XOR registers",RdV=RsV^RtV) 45 COND_ALU(A2_pand,"Rd32=and(Rs32,Rt32)","Conditionally AND registers",RdV=RsV&RtV) 46 COND_ALU(A2_por,"Rd32=or(Rs32,Rt32)","Conditionally OR registers",RdV=RsV|RtV) 47 48 COND_ALU(A4_psxtb,"Rd32=sxtb(Rs32)","Conditionally sign-extend byte", RdV=fSXTN(8,32,RsV)) 49 COND_ALU(A4_pzxtb,"Rd32=zxtb(Rs32)","Conditionally zero-extend byte", RdV=fZXTN(8,32,RsV)) 50 COND_ALU(A4_psxth,"Rd32=sxth(Rs32)","Conditionally sign-extend halfword", RdV=fSXTN(16,32,RsV)) 51 COND_ALU(A4_pzxth,"Rd32=zxth(Rs32)","Conditionally zero-extend halfword", RdV=fZXTN(16,32,RsV)) 52 COND_ALU(A4_paslh,"Rd32=aslh(Rs32)","Conditionally zero-extend halfword", RdV=RsV<<16) 53 COND_ALU(A4_pasrh,"Rd32=asrh(Rs32)","Conditionally zero-extend halfword", RdV=RsV>>16) 54 55 56 Q6INSN(A2_addsat,"Rd32=add(Rs32,Rt32):sat",ATTRIBS(), 57 "Add 32-bit registers with saturation", 58 { RdV=fSAT(fSE32_64(RsV)+fSE32_64(RtV)); }) 59 60 Q6INSN(A2_subsat,"Rd32=sub(Rt32,Rs32):sat",ATTRIBS(), 61 "Subtract 32-bit registers with saturation", 62 { RdV=fSAT(fSE32_64(RtV) - fSE32_64(RsV)); }) 63 64 65 Q6INSN(A2_addi,"Rd32=add(Rs32,#s16)",ATTRIBS(), 66 "Add a signed immediate to a register", 67 { fIMMEXT(siV); RdV=RsV+siV;}) 68 69 70 Q6INSN(C4_addipc,"Rd32=add(pc,#u6)",ATTRIBS(), 71 "Add immediate to PC", 72 { RdV=fREAD_PC()+fIMMEXT(uiV);}) 73 74 75 76 /**********************************************/ 77 /* Single-precision HL forms */ 78 /* These insns and the SP mpy are the ones */ 79 /* that can do .HL stuff */ 80 /**********************************************/ 81 #define STD_HL_INSN(TAG,OPER,AOPER,ATR,SEM)\ 82 Q6INSN(A2_##TAG##_ll, OPER"(Rt.L32,Rs.L32)"AOPER, ATR,"",{SEM(fGETHALF(0,RtV),fGETHALF(0,RsV));})\ 83 Q6INSN(A2_##TAG##_lh, OPER"(Rt.L32,Rs.H32)"AOPER, ATR,"",{SEM(fGETHALF(0,RtV),fGETHALF(1,RsV));})\ 84 Q6INSN(A2_##TAG##_hl, OPER"(Rt.H32,Rs.L32)"AOPER, ATR,"",{SEM(fGETHALF(1,RtV),fGETHALF(0,RsV));})\ 85 Q6INSN(A2_##TAG##_hh, OPER"(Rt.H32,Rs.H32)"AOPER, ATR,"",{SEM(fGETHALF(1,RtV),fGETHALF(1,RsV));}) 86 87 #define SUBSTD_HL_INSN(TAG,OPER,AOPER,ATR,SEM)\ 88 Q6INSN(A2_##TAG##_ll, OPER"(Rt.L32,Rs.L32)"AOPER, ATR,"",{SEM(fGETHALF(0,RtV),fGETHALF(0,RsV));})\ 89 Q6INSN(A2_##TAG##_hl, OPER"(Rt.L32,Rs.H32)"AOPER, ATR,"",{SEM(fGETHALF(0,RtV),fGETHALF(1,RsV));}) 90 91 92 #undef HLSEM 93 #define HLSEM(A,B) RdV=fSXTN(16,32,(A+B)) 94 SUBSTD_HL_INSN(addh_l16,"Rd32=add","",ATTRIBS(),HLSEM) 95 96 #undef HLSEM 97 #define HLSEM(A,B) RdV=fSATH(A+B) 98 SUBSTD_HL_INSN(addh_l16_sat,"Rd32=add",":sat",ATTRIBS(),HLSEM) 99 100 #undef HLSEM 101 #define HLSEM(A,B) RdV=fSXTN(16,32,(A-B)) 102 SUBSTD_HL_INSN(subh_l16,"Rd32=sub","",ATTRIBS(),HLSEM) 103 104 #undef HLSEM 105 #define HLSEM(A,B) RdV=fSATH(A-B) 106 SUBSTD_HL_INSN(subh_l16_sat,"Rd32=sub",":sat",ATTRIBS(),HLSEM) 107 108 #undef HLSEM 109 #define HLSEM(A,B) RdV=(A+B)<<16 110 STD_HL_INSN(addh_h16,"Rd32=add",":<<16",ATTRIBS(),HLSEM) 111 112 #undef HLSEM 113 #define HLSEM(A,B) RdV=(fSATH(A+B))<<16 114 STD_HL_INSN(addh_h16_sat,"Rd32=add",":sat:<<16",ATTRIBS(),HLSEM) 115 116 #undef HLSEM 117 #define HLSEM(A,B) RdV=(A-B)<<16 118 STD_HL_INSN(subh_h16,"Rd32=sub",":<<16",ATTRIBS(),HLSEM) 119 120 #undef HLSEM 121 #define HLSEM(A,B) RdV=(fSATH(A-B))<<16 122 STD_HL_INSN(subh_h16_sat,"Rd32=sub",":sat:<<16",ATTRIBS(),HLSEM) 123 124 125 126 127 Q6INSN(A2_aslh,"Rd32=aslh(Rs32)",ATTRIBS(), 128 "Arithmetic Shift Left by Halfword",{ RdV=RsV<<16; }) 129 130 Q6INSN(A2_asrh,"Rd32=asrh(Rs32)",ATTRIBS(), 131 "Arithmetic Shift Right by Halfword",{ RdV=RsV>>16; }) 132 133 134 /* 64-bit versions */ 135 136 Q6INSN(A2_addp,"Rdd32=add(Rss32,Rtt32)",ATTRIBS(), 137 "Add", 138 { RddV=RssV+RttV;}) 139 140 Q6INSN(A2_addpsat,"Rdd32=add(Rss32,Rtt32):sat",ATTRIBS(A_ARCHV3), 141 "Add", 142 { fADDSAT64(RddV,RssV,RttV);}) 143 144 Q6INSN(A2_addspl,"Rdd32=add(Rss32,Rtt32):raw:lo",ATTRIBS(A_ARCHV3), 145 "Add", 146 { RddV=RttV+fSXTN(32,64,fGETWORD(0,RssV));}) 147 148 Q6INSN(A2_addsph,"Rdd32=add(Rss32,Rtt32):raw:hi",ATTRIBS(A_ARCHV3), 149 "Add", 150 { RddV=RttV+fSXTN(32,64,fGETWORD(1,RssV));}) 151 152 Q6INSN(A2_subp,"Rdd32=sub(Rtt32,Rss32)",ATTRIBS(), 153 "Sub", 154 { RddV=RttV-RssV;}) 155 156 /* 64-bit with carry */ 157 158 Q6INSN(A4_addp_c,"Rdd32=add(Rss32,Rtt32,Px4):carry",ATTRIBS(),"Add with Carry", 159 { 160 RddV = RssV + RttV + fLSBOLD(PxV); 161 PxV = f8BITSOF(fCARRY_FROM_ADD(RssV,RttV,fLSBOLD(PxV))); 162 }) 163 164 Q6INSN(A4_subp_c,"Rdd32=sub(Rss32,Rtt32,Px4):carry",ATTRIBS(),"Sub with Carry", 165 { 166 RddV = RssV + ~RttV + fLSBOLD(PxV); 167 PxV = f8BITSOF(fCARRY_FROM_ADD(RssV,~RttV,fLSBOLD(PxV))); 168 }) 169 170 171 /* NEG and ABS */ 172 173 Q6INSN(A2_negsat,"Rd32=neg(Rs32):sat",ATTRIBS(), 174 "Arithmetic negate register", { RdV = fSAT(-fCAST8s(RsV)); }) 175 176 Q6INSN(A2_abs,"Rd32=abs(Rs32)",ATTRIBS(), 177 "Absolute Value register", { RdV = fABS(RsV); }) 178 179 Q6INSN(A2_abssat,"Rd32=abs(Rs32):sat",ATTRIBS(), 180 "Arithmetic negate register", { RdV = fSAT(fABS(fCAST4_8s(RsV))); }) 181 182 Q6INSN(A2_vconj,"Rdd32=vconj(Rss32):sat",ATTRIBS(A_ARCHV2), 183 "Vector Complex conjugate of Rss", 184 { fSETHALF(1,RddV,fSATN(16,-fGETHALF(1,RssV))); 185 fSETHALF(0,RddV,fGETHALF(0,RssV)); 186 fSETHALF(3,RddV,fSATN(16,-fGETHALF(3,RssV))); 187 fSETHALF(2,RddV,fGETHALF(2,RssV)); 188 }) 189 190 191 /* 64-bit versions */ 192 193 Q6INSN(A2_negp,"Rdd32=neg(Rss32)",ATTRIBS(), 194 "Arithmetic negate register", { RddV = -RssV; }) 195 196 Q6INSN(A2_absp,"Rdd32=abs(Rss32)",ATTRIBS(), 197 "Absolute Value register", { RddV = fABS(RssV); }) 198 199 200 /* MIN and MAX R */ 201 202 Q6INSN(A2_max,"Rd32=max(Rs32,Rt32)",ATTRIBS(), 203 "Maximum of two registers", 204 { RdV = fMAX(RsV,RtV); }) 205 206 Q6INSN(A2_maxu,"Rd32=maxu(Rs32,Rt32)",ATTRIBS(), 207 "Maximum of two registers (unsigned)", 208 { RdV = fMAX(fCAST4u(RsV),fCAST4u(RtV)); }) 209 210 Q6INSN(A2_min,"Rd32=min(Rt32,Rs32)",ATTRIBS(), 211 "Minimum of two registers", 212 { RdV = fMIN(RtV,RsV); }) 213 214 Q6INSN(A2_minu,"Rd32=minu(Rt32,Rs32)",ATTRIBS(), 215 "Minimum of two registers (unsigned)", 216 { RdV = fMIN(fCAST4u(RtV),fCAST4u(RsV)); }) 217 218 /* MIN and MAX Pairs */ 219 #if 1 220 Q6INSN(A2_maxp,"Rdd32=max(Rss32,Rtt32)",ATTRIBS(A_ARCHV3), 221 "Maximum of two register pairs", 222 { RddV = fMAX(RssV,RttV); }) 223 224 Q6INSN(A2_maxup,"Rdd32=maxu(Rss32,Rtt32)",ATTRIBS(A_ARCHV3), 225 "Maximum of two register pairs (unsigned)", 226 { RddV = fMAX(fCAST8u(RssV),fCAST8u(RttV)); }) 227 228 Q6INSN(A2_minp,"Rdd32=min(Rtt32,Rss32)",ATTRIBS(A_ARCHV3), 229 "Minimum of two register pairs", 230 { RddV = fMIN(RttV,RssV); }) 231 232 Q6INSN(A2_minup,"Rdd32=minu(Rtt32,Rss32)",ATTRIBS(A_ARCHV3), 233 "Minimum of two register pairs (unsigned)", 234 { RddV = fMIN(fCAST8u(RttV),fCAST8u(RssV)); }) 235 #endif 236 237 /**********************************************/ 238 /* Register and Immediate Transfers */ 239 /**********************************************/ 240 241 Q6INSN(A2_nop,"nop",ATTRIBS(A_IT_NOP), 242 "Nop (32-bit encoding)", 243 fHIDE( { } )) 244 245 246 Q6INSN(A4_ext,"immext(#u26:6)",ATTRIBS(A_IT_EXTENDER), 247 "This instruction carries the 26 most-significant immediate bits for the next instruction", 248 { fHIDE(); }) 249 250 251 Q6INSN(A2_tfr,"Rd32=Rs32",ATTRIBS(), 252 "tfr register",{ RdV=RsV;}) 253 254 Q6INSN(A2_tfrsi,"Rd32=#s16",ATTRIBS(), 255 "transfer signed immediate to register",{ fIMMEXT(siV); RdV=siV;}) 256 257 Q6INSN(A2_sxtb,"Rd32=sxtb(Rs32)",ATTRIBS(), 258 "Sign extend byte", {RdV = fSXTN(8,32,RsV);}) 259 260 Q6INSN(A2_zxth,"Rd32=zxth(Rs32)",ATTRIBS(), 261 "Zero extend half", {RdV = fZXTN(16,32,RsV);}) 262 263 Q6INSN(A2_sxth,"Rd32=sxth(Rs32)",ATTRIBS(), 264 "Sign extend half", {RdV = fSXTN(16,32,RsV);}) 265 266 Q6INSN(A2_combinew,"Rdd32=combine(Rs32,Rt32)",ATTRIBS(), 267 "Combine two words into a register pair", 268 { fSETWORD(0,RddV,RtV); 269 fSETWORD(1,RddV,RsV); 270 }) 271 272 Q6INSN(A4_combineri,"Rdd32=combine(Rs32,#s8)",ATTRIBS(), 273 "Combine a word and an immediate into a register pair", 274 { fIMMEXT(siV); fSETWORD(0,RddV,siV); 275 fSETWORD(1,RddV,RsV); 276 }) 277 278 Q6INSN(A4_combineir,"Rdd32=combine(#s8,Rs32)",ATTRIBS(), 279 "Combine a word and an immediate into a register pair", 280 { fIMMEXT(siV); fSETWORD(0,RddV,RsV); 281 fSETWORD(1,RddV,siV); 282 }) 283 284 285 286 Q6INSN(A2_combineii,"Rdd32=combine(#s8,#S8)",ATTRIBS(A_ARCHV2), 287 "Set two small immediates", 288 { fIMMEXT(siV); fSETWORD(0,RddV,SiV); fSETWORD(1,RddV,siV); }) 289 290 Q6INSN(A4_combineii,"Rdd32=combine(#s8,#U6)",ATTRIBS(),"Set two small immediates", 291 { fIMMEXT(UiV); fSETWORD(0,RddV,UiV); fSETWORD(1,RddV,siV); }) 292 293 294 Q6INSN(A2_combine_hh,"Rd32=combine(Rt.H32,Rs.H32)",ATTRIBS(), 295 "Combine two halfs into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(1,RsV);}) 296 297 Q6INSN(A2_combine_hl,"Rd32=combine(Rt.H32,Rs.L32)",ATTRIBS(), 298 "Combine two halfs into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(0,RsV);}) 299 300 Q6INSN(A2_combine_lh,"Rd32=combine(Rt.L32,Rs.H32)",ATTRIBS(), 301 "Combine two halfs into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(1,RsV);}) 302 303 Q6INSN(A2_combine_ll,"Rd32=combine(Rt.L32,Rs.L32)",ATTRIBS(), 304 "Combine two halfs into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(0,RsV);}) 305 306 Q6INSN(A2_tfril,"Rx.L32=#u16",ATTRIBS(), 307 "Set low 16-bits, leave upper 16 unchanged",{ fSETHALF(0,RxV,uiV);}) 308 309 Q6INSN(A2_tfrih,"Rx.H32=#u16",ATTRIBS(), 310 "Set high 16-bits, leave low 16 unchanged",{ fSETHALF(1,RxV,uiV);}) 311 312 Q6INSN(A2_tfrcrr,"Rd32=Cs32",ATTRIBS(), 313 "transfer control register to general register",{ RdV=CsV;}) 314 315 Q6INSN(A2_tfrrcr,"Cd32=Rs32",ATTRIBS(), 316 "transfer general register to control register",{ CdV=RsV;}) 317 318 Q6INSN(A4_tfrcpp,"Rdd32=Css32",ATTRIBS(), 319 "transfer control register to general register",{ RddV=CssV;}) 320 321 Q6INSN(A4_tfrpcp,"Cdd32=Rss32",ATTRIBS(), 322 "transfer general register to control register",{ CddV=RssV;}) 323 324 325 /**********************************************/ 326 /* Logicals */ 327 /**********************************************/ 328 329 Q6INSN(A2_and,"Rd32=and(Rs32,Rt32)",ATTRIBS(), 330 "logical AND",{ RdV=RsV&RtV;}) 331 332 Q6INSN(A2_or,"Rd32=or(Rs32,Rt32)",ATTRIBS(), 333 "logical OR",{ RdV=RsV|RtV;}) 334 335 Q6INSN(A2_xor,"Rd32=xor(Rs32,Rt32)",ATTRIBS(), 336 "logical XOR",{ RdV=RsV^RtV;}) 337 338 Q6INSN(M2_xor_xacc,"Rx32^=xor(Rs32,Rt32)",ATTRIBS(A_ARCHV2), 339 "logical XOR with XOR accumulation",{ RxV^=RsV^RtV;}) 340 341 Q6INSN(M4_xor_xacc,"Rxx32^=xor(Rss32,Rtt32)",, 342 "logical XOR with XOR accumulation",{ RxxV^=RssV^RttV;}) 343 344 345 346 Q6INSN(A4_andn,"Rd32=and(Rt32,~Rs32)",, 347 "And-Not", { RdV = (RtV & ~RsV); }) 348 349 Q6INSN(A4_orn,"Rd32=or(Rt32,~Rs32)",, 350 "Or-Not", { RdV = (RtV | ~RsV); }) 351 352 353 Q6INSN(A4_andnp,"Rdd32=and(Rtt32,~Rss32)",, 354 "And-Not", { RddV = (RttV & ~RssV); }) 355 356 Q6INSN(A4_ornp,"Rdd32=or(Rtt32,~Rss32)",, 357 "Or-Not", { RddV = (RttV | ~RssV); }) 358 359 360 361 362 /********************/ 363 /* Compound add-add */ 364 /********************/ 365 366 Q6INSN(S4_addaddi,"Rd32=add(Rs32,add(Ru32,#s6))",ATTRIBS(), 367 "3-input add", 368 { RdV = RsV + RuV + fIMMEXT(siV); }) 369 370 371 Q6INSN(S4_subaddi,"Rd32=add(Rs32,sub(#s6,Ru32))",ATTRIBS(), 372 "3-input sub", 373 { RdV = RsV - RuV + fIMMEXT(siV); }) 374 375 376 377 /****************************/ 378 /* Compound logical-logical */ 379 /****************************/ 380 381 Q6INSN(M4_and_and,"Rx32&=and(Rs32,Rt32)",ATTRIBS(), 382 "Compound And-And", { RxV &= (RsV & RtV); }) 383 384 Q6INSN(M4_and_andn,"Rx32&=and(Rs32,~Rt32)",ATTRIBS(), 385 "Compound And-Andn", { RxV &= (RsV & ~RtV); }) 386 387 Q6INSN(M4_and_or,"Rx32&=or(Rs32,Rt32)",ATTRIBS(), 388 "Compound And-Or", { RxV &= (RsV | RtV); }) 389 390 Q6INSN(M4_and_xor,"Rx32&=xor(Rs32,Rt32)",ATTRIBS(), 391 "Compound And-xor", { RxV &= (RsV ^ RtV); }) 392 393 394 395 Q6INSN(M4_or_and,"Rx32|=and(Rs32,Rt32)",ATTRIBS(), 396 "Compound Or-And", { RxV |= (RsV & RtV); }) 397 398 Q6INSN(M4_or_andn,"Rx32|=and(Rs32,~Rt32)",ATTRIBS(), 399 "Compound Or-AndN", { RxV |= (RsV & ~RtV); }) 400 401 Q6INSN(M4_or_or,"Rx32|=or(Rs32,Rt32)",ATTRIBS(), 402 "Compound Or-Or", { RxV |= (RsV | RtV); }) 403 404 Q6INSN(M4_or_xor,"Rx32|=xor(Rs32,Rt32)",ATTRIBS(), 405 "Compound Or-xor", { RxV |= (RsV ^ RtV); }) 406 407 408 Q6INSN(S4_or_andix,"Rx32=or(Ru32,and(Rx32,#s10))",ATTRIBS(), 409 "Compound Or-And", { RxV = RuV | (RxV & fIMMEXT(siV)); }) 410 411 Q6INSN(S4_or_andi,"Rx32|=and(Rs32,#s10)",ATTRIBS(), 412 "Compound Or-And", { RxV = RxV | (RsV & fIMMEXT(siV)); }) 413 414 Q6INSN(S4_or_ori,"Rx32|=or(Rs32,#s10)",ATTRIBS(), 415 "Compound Or-And", { RxV = RxV | (RsV | fIMMEXT(siV)); }) 416 417 418 419 420 Q6INSN(M4_xor_and,"Rx32^=and(Rs32,Rt32)",ATTRIBS(), 421 "Compound Xor-And", { RxV ^= (RsV & RtV); }) 422 423 Q6INSN(M4_xor_or,"Rx32^=or(Rs32,Rt32)",ATTRIBS(), 424 "Compound Xor-Or", { RxV ^= (RsV | RtV); }) 425 426 Q6INSN(M4_xor_andn,"Rx32^=and(Rs32,~Rt32)",ATTRIBS(), 427 "Compound Xor-And", { RxV ^= (RsV & ~RtV); }) 428 429 430 431 432 433 434 Q6INSN(A2_subri,"Rd32=sub(#s10,Rs32)",ATTRIBS(A_ARCHV2), 435 "Subtract register from immediate",{ fIMMEXT(siV); RdV=siV-RsV;}) 436 437 Q6INSN(A2_andir,"Rd32=and(Rs32,#s10)",ATTRIBS(A_ARCHV2), 438 "logical AND with immediate",{ fIMMEXT(siV); RdV=RsV&siV;}) 439 440 Q6INSN(A2_orir,"Rd32=or(Rs32,#s10)",ATTRIBS(A_ARCHV2), 441 "logical OR with immediate",{ fIMMEXT(siV); RdV=RsV|siV;}) 442 443 444 445 446 Q6INSN(A2_andp,"Rdd32=and(Rss32,Rtt32)",ATTRIBS(), 447 "logical AND pair",{ RddV=RssV&RttV;}) 448 449 Q6INSN(A2_orp,"Rdd32=or(Rss32,Rtt32)",ATTRIBS(), 450 "logical OR pair",{ RddV=RssV|RttV;}) 451 452 Q6INSN(A2_xorp,"Rdd32=xor(Rss32,Rtt32)",ATTRIBS(), 453 "logical eXclusive OR pair",{ RddV=RssV^RttV;}) 454 455 Q6INSN(A2_notp,"Rdd32=not(Rss32)",ATTRIBS(), 456 "logical NOT pair",{ RddV=~RssV;}) 457 458 Q6INSN(A2_sxtw,"Rdd32=sxtw(Rs32)",ATTRIBS(), 459 "Sign extend 32-bit word to 64-bit pair", 460 { RddV = fCAST4_8s(RsV); }) 461 462 Q6INSN(A2_sat,"Rd32=sat(Rss32)",ATTRIBS(), 463 "Saturate to 32-bit Signed", 464 { RdV = fSAT(RssV); }) 465 466 Q6INSN(A2_roundsat,"Rd32=round(Rss32):sat",ATTRIBS(), 467 "Round & Saturate to 32-bit Signed", 468 { fHIDE(size8s_t tmp;) fADDSAT64(tmp,RssV,0x080000000ULL); RdV = fGETWORD(1,tmp); }) 469 470 Q6INSN(A2_sath,"Rd32=sath(Rs32)",ATTRIBS(), 471 "Saturate to 16-bit Signed", 472 { RdV = fSATH(RsV); }) 473 474 Q6INSN(A2_satuh,"Rd32=satuh(Rs32)",ATTRIBS(), 475 "Saturate to 16-bit Unsigned", 476 { RdV = fSATUH(RsV); }) 477 478 Q6INSN(A2_satub,"Rd32=satub(Rs32)",ATTRIBS(), 479 "Saturate to 8-bit Unsigned", 480 { RdV = fSATUB(RsV); }) 481 482 Q6INSN(A2_satb,"Rd32=satb(Rs32)",ATTRIBS(A_ARCHV2), 483 "Saturate to 8-bit Signed", 484 { RdV = fSATB(RsV); }) 485 486 /**********************************************/ 487 /* Vector Add */ 488 /**********************************************/ 489 490 Q6INSN(A2_vaddub,"Rdd32=vaddub(Rss32,Rtt32)",ATTRIBS(), 491 "Add vector of bytes", 492 { 493 fHIDE(int i;) 494 for (i = 0; i < 8; i++) { 495 fSETBYTE(i,RddV,(fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV))); 496 } 497 }) 498 499 Q6INSN(A2_vaddubs,"Rdd32=vaddub(Rss32,Rtt32):sat",ATTRIBS(), 500 "Add vector of bytes", 501 { 502 fHIDE(int i;) 503 for (i = 0; i < 8; i++) { 504 fSETBYTE(i,RddV,fSATUN(8,fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV))); 505 } 506 }) 507 508 Q6INSN(A2_vaddh,"Rdd32=vaddh(Rss32,Rtt32)",ATTRIBS(), 509 "Add vector of half integers", 510 { 511 fHIDE(int i;) 512 for (i=0;i<4;i++) { 513 fSETHALF(i,RddV,fGETHALF(i,RssV)+fGETHALF(i,RttV)); 514 } 515 }) 516 517 Q6INSN(A2_vaddhs,"Rdd32=vaddh(Rss32,Rtt32):sat",ATTRIBS(), 518 "Add vector of half integers with saturation", 519 { 520 fHIDE(int i;) 521 for (i=0;i<4;i++) { 522 fSETHALF(i,RddV,fSATN(16,fGETHALF(i,RssV)+fGETHALF(i,RttV))); 523 } 524 }) 525 526 Q6INSN(A2_vadduhs,"Rdd32=vadduh(Rss32,Rtt32):sat",ATTRIBS(), 527 "Add vector of unsigned half integers with saturation", 528 { 529 fHIDE(int i;) 530 for (i=0;i<4;i++) { 531 fSETHALF(i,RddV,fSATUN(16,fGETUHALF(i,RssV)+fGETUHALF(i,RttV))); 532 } 533 }) 534 535 Q6INSN(A5_vaddhubs,"Rd32=vaddhub(Rss32,Rtt32):sat",ATTRIBS(), 536 "Add vector of half integers with saturation and pack to unsigned bytes", 537 { 538 fHIDE(int i;) 539 for (i=0;i<4;i++) { 540 fSETBYTE(i,RdV,fSATUB(fGETHALF(i,RssV)+fGETHALF(i,RttV))); 541 } 542 }) 543 544 Q6INSN(A2_vaddw,"Rdd32=vaddw(Rss32,Rtt32)",ATTRIBS(), 545 "Add vector of words", 546 { 547 fHIDE(int i;) 548 for (i=0;i<2;i++) { 549 fSETWORD(i,RddV,fGETWORD(i,RssV)+fGETWORD(i,RttV)); 550 } 551 }) 552 553 Q6INSN(A2_vaddws,"Rdd32=vaddw(Rss32,Rtt32):sat",ATTRIBS(), 554 "Add vector of words with saturation", 555 { 556 fHIDE(int i;) 557 for (i=0;i<2;i++) { 558 fSETWORD(i,RddV,fSATN(32,fGETWORD(i,RssV)+fGETWORD(i,RttV))); 559 } 560 }) 561 562 563 564 Q6INSN(S4_vxaddsubw,"Rdd32=vxaddsubw(Rss32,Rtt32):sat",ATTRIBS(), 565 "Cross vector add-sub words with saturation", 566 { 567 fSETWORD(0,RddV,fSAT(fGETWORD(0,RssV)+fGETWORD(1,RttV))); 568 fSETWORD(1,RddV,fSAT(fGETWORD(1,RssV)-fGETWORD(0,RttV))); 569 }) 570 Q6INSN(S4_vxsubaddw,"Rdd32=vxsubaddw(Rss32,Rtt32):sat",ATTRIBS(), 571 "Cross vector sub-add words with saturation", 572 { 573 fSETWORD(0,RddV,fSAT(fGETWORD(0,RssV)-fGETWORD(1,RttV))); 574 fSETWORD(1,RddV,fSAT(fGETWORD(1,RssV)+fGETWORD(0,RttV))); 575 }) 576 577 578 579 Q6INSN(S4_vxaddsubh,"Rdd32=vxaddsubh(Rss32,Rtt32):sat",ATTRIBS(), 580 "Cross vector add-sub halfwords with saturation", 581 { 582 fSETHALF(0,RddV,fSATH(fGETHALF(0,RssV)+fGETHALF(1,RttV))); 583 fSETHALF(1,RddV,fSATH(fGETHALF(1,RssV)-fGETHALF(0,RttV))); 584 585 fSETHALF(2,RddV,fSATH(fGETHALF(2,RssV)+fGETHALF(3,RttV))); 586 fSETHALF(3,RddV,fSATH(fGETHALF(3,RssV)-fGETHALF(2,RttV))); 587 588 }) 589 Q6INSN(S4_vxsubaddh,"Rdd32=vxsubaddh(Rss32,Rtt32):sat",ATTRIBS(), 590 "Cross vector sub-add halfwords with saturation", 591 { 592 fSETHALF(0,RddV,fSATH(fGETHALF(0,RssV)-fGETHALF(1,RttV))); 593 fSETHALF(1,RddV,fSATH(fGETHALF(1,RssV)+fGETHALF(0,RttV))); 594 595 fSETHALF(2,RddV,fSATH(fGETHALF(2,RssV)-fGETHALF(3,RttV))); 596 fSETHALF(3,RddV,fSATH(fGETHALF(3,RssV)+fGETHALF(2,RttV))); 597 }) 598 599 600 601 602 Q6INSN(S4_vxaddsubhr,"Rdd32=vxaddsubh(Rss32,Rtt32):rnd:>>1:sat",ATTRIBS(), 603 "Cross vector add-sub halfwords with shift, round, and saturation", 604 { 605 fSETHALF(0,RddV,fSATH((fGETHALF(0,RssV)+fGETHALF(1,RttV)+1)>>1)); 606 fSETHALF(1,RddV,fSATH((fGETHALF(1,RssV)-fGETHALF(0,RttV)+1)>>1)); 607 608 fSETHALF(2,RddV,fSATH((fGETHALF(2,RssV)+fGETHALF(3,RttV)+1)>>1)); 609 fSETHALF(3,RddV,fSATH((fGETHALF(3,RssV)-fGETHALF(2,RttV)+1)>>1)); 610 611 }) 612 Q6INSN(S4_vxsubaddhr,"Rdd32=vxsubaddh(Rss32,Rtt32):rnd:>>1:sat",ATTRIBS(), 613 "Cross vector sub-add halfwords with shift, round, and saturation", 614 { 615 fSETHALF(0,RddV,fSATH((fGETHALF(0,RssV)-fGETHALF(1,RttV)+1)>>1)); 616 fSETHALF(1,RddV,fSATH((fGETHALF(1,RssV)+fGETHALF(0,RttV)+1)>>1)); 617 618 fSETHALF(2,RddV,fSATH((fGETHALF(2,RssV)-fGETHALF(3,RttV)+1)>>1)); 619 fSETHALF(3,RddV,fSATH((fGETHALF(3,RssV)+fGETHALF(2,RttV)+1)>>1)); 620 }) 621 622 623 624 625 626 /**********************************************/ 627 /* 1/2 Vector operations */ 628 /**********************************************/ 629 630 631 Q6INSN(A2_svavgh,"Rd32=vavgh(Rs32,Rt32)",ATTRIBS(A_ARCHV2), 632 "Avg vector of half integers", 633 { 634 fHIDE(int i;) 635 for (i=0;i<2;i++) { 636 fSETHALF(i,RdV,((fGETHALF(i,RsV)+fGETHALF(i,RtV))>>1)); 637 } 638 }) 639 640 Q6INSN(A2_svavghs,"Rd32=vavgh(Rs32,Rt32):rnd",ATTRIBS(A_ARCHV2), 641 "Avg vector of half integers with rounding", 642 { 643 fHIDE(int i;) 644 for (i=0;i<2;i++) { 645 fSETHALF(i,RdV,((fGETHALF(i,RsV)+fGETHALF(i,RtV)+1)>>1)); 646 } 647 }) 648 649 650 651 Q6INSN(A2_svnavgh,"Rd32=vnavgh(Rt32,Rs32)",ATTRIBS(A_ARCHV2), 652 "Avg vector of half integers", 653 { 654 fHIDE(int i;) 655 for (i=0;i<2;i++) { 656 fSETHALF(i,RdV,((fGETHALF(i,RtV)-fGETHALF(i,RsV))>>1)); 657 } 658 }) 659 660 661 Q6INSN(A2_svaddh,"Rd32=vaddh(Rs32,Rt32)",ATTRIBS(), 662 "Add vector of half integers", 663 { 664 fHIDE(int i;) 665 for (i=0;i<2;i++) { 666 fSETHALF(i,RdV,fGETHALF(i,RsV)+fGETHALF(i,RtV)); 667 } 668 }) 669 670 Q6INSN(A2_svaddhs,"Rd32=vaddh(Rs32,Rt32):sat",ATTRIBS(), 671 "Add vector of half integers with saturation", 672 { 673 fHIDE(int i;) 674 for (i=0;i<2;i++) { 675 fSETHALF(i,RdV,fSATN(16,fGETHALF(i,RsV)+fGETHALF(i,RtV))); 676 } 677 }) 678 679 Q6INSN(A2_svadduhs,"Rd32=vadduh(Rs32,Rt32):sat",ATTRIBS(), 680 "Add vector of unsigned half integers with saturation", 681 { 682 fHIDE(int i;) 683 for (i=0;i<2;i++) { 684 fSETHALF(i,RdV,fSATUN(16,fGETUHALF(i,RsV)+fGETUHALF(i,RtV))); 685 } 686 }) 687 688 689 Q6INSN(A2_svsubh,"Rd32=vsubh(Rt32,Rs32)",ATTRIBS(), 690 "Sub vector of half integers", 691 { 692 fHIDE(int i;) 693 for (i=0;i<2;i++) { 694 fSETHALF(i,RdV,fGETHALF(i,RtV)-fGETHALF(i,RsV)); 695 } 696 }) 697 698 Q6INSN(A2_svsubhs,"Rd32=vsubh(Rt32,Rs32):sat",ATTRIBS(), 699 "Sub vector of half integers with saturation", 700 { 701 fHIDE(int i;) 702 for (i=0;i<2;i++) { 703 fSETHALF(i,RdV,fSATN(16,fGETHALF(i,RtV)-fGETHALF(i,RsV))); 704 } 705 }) 706 707 Q6INSN(A2_svsubuhs,"Rd32=vsubuh(Rt32,Rs32):sat",ATTRIBS(), 708 "Sub vector of unsigned half integers with saturation", 709 { 710 fHIDE(int i;) 711 for (i=0;i<2;i++) { 712 fSETHALF(i,RdV,fSATUN(16,fGETUHALF(i,RtV)-fGETUHALF(i,RsV))); 713 } 714 }) 715 716 717 718 719 /**********************************************/ 720 /* Vector Reduce Add */ 721 /**********************************************/ 722 723 Q6INSN(A2_vraddub,"Rdd32=vraddub(Rss32,Rtt32)",ATTRIBS(), 724 "Sum: two vectors of unsigned bytes", 725 { 726 fHIDE(int i;) 727 RddV = 0; 728 for (i=0;i<4;i++) { 729 fSETWORD(0,RddV,(fGETWORD(0,RddV) + (fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV)))); 730 } 731 for (i=4;i<8;i++) { 732 fSETWORD(1,RddV,(fGETWORD(1,RddV) + (fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV)))); 733 } 734 }) 735 736 Q6INSN(A2_vraddub_acc,"Rxx32+=vraddub(Rss32,Rtt32)",ATTRIBS(), 737 "Sum: two vectors of unsigned bytes", 738 { 739 fHIDE(int i;) 740 for (i = 0; i < 4; i++) { 741 fSETWORD(0,RxxV,(fGETWORD(0,RxxV) + (fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV)))); 742 } 743 for (i = 4; i < 8; i++) { 744 fSETWORD(1,RxxV,(fGETWORD(1,RxxV) + (fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV)))); 745 } 746 }) 747 748 749 750 Q6INSN(M2_vraddh,"Rd32=vraddh(Rss32,Rtt32)",ATTRIBS(A_ARCHV3), 751 "Sum: two vectors of halves", 752 { 753 fHIDE(int i;) 754 RdV = 0; 755 for (i=0;i<4;i++) { 756 RdV += (fGETHALF(i,RssV)+fGETHALF(i,RttV)); 757 } 758 }) 759 760 Q6INSN(M2_vradduh,"Rd32=vradduh(Rss32,Rtt32)",ATTRIBS(A_ARCHV3), 761 "Sum: two vectors of unsigned halves", 762 { 763 fHIDE(int i;) 764 RdV = 0; 765 for (i=0;i<4;i++) { 766 RdV += (fGETUHALF(i,RssV)+fGETUHALF(i,RttV)); 767 } 768 }) 769 770 /**********************************************/ 771 /* Vector Sub */ 772 /**********************************************/ 773 774 Q6INSN(A2_vsubub,"Rdd32=vsubub(Rtt32,Rss32)",ATTRIBS(), 775 "Sub vector of bytes", 776 { 777 fHIDE(int i;) 778 for (i = 0; i < 8; i++) { 779 fSETBYTE(i,RddV,(fGETUBYTE(i,RttV)-fGETUBYTE(i,RssV))); 780 } 781 }) 782 783 Q6INSN(A2_vsububs,"Rdd32=vsubub(Rtt32,Rss32):sat",ATTRIBS(), 784 "Sub vector of bytes", 785 { 786 fHIDE(int i;) 787 for (i = 0; i < 8; i++) { 788 fSETBYTE(i,RddV,fSATUN(8,fGETUBYTE(i,RttV)-fGETUBYTE(i,RssV))); 789 } 790 }) 791 792 Q6INSN(A2_vsubh,"Rdd32=vsubh(Rtt32,Rss32)",ATTRIBS(), 793 "Sub vector of half integers", 794 { 795 fHIDE(int i;) 796 for (i=0;i<4;i++) { 797 fSETHALF(i,RddV,fGETHALF(i,RttV)-fGETHALF(i,RssV)); 798 } 799 }) 800 801 Q6INSN(A2_vsubhs,"Rdd32=vsubh(Rtt32,Rss32):sat",ATTRIBS(), 802 "Sub vector of half integers with saturation", 803 { 804 fHIDE(int i;) 805 for (i=0;i<4;i++) { 806 fSETHALF(i,RddV,fSATN(16,fGETHALF(i,RttV)-fGETHALF(i,RssV))); 807 } 808 }) 809 810 Q6INSN(A2_vsubuhs,"Rdd32=vsubuh(Rtt32,Rss32):sat",ATTRIBS(), 811 "Sub vector of unsigned half integers with saturation", 812 { 813 fHIDE(int i;) 814 for (i=0;i<4;i++) { 815 fSETHALF(i,RddV,fSATUN(16,fGETUHALF(i,RttV)-fGETUHALF(i,RssV))); 816 } 817 }) 818 819 Q6INSN(A2_vsubw,"Rdd32=vsubw(Rtt32,Rss32)",ATTRIBS(), 820 "Sub vector of words", 821 { 822 fHIDE(int i;) 823 for (i=0;i<2;i++) { 824 fSETWORD(i,RddV,fGETWORD(i,RttV)-fGETWORD(i,RssV)); 825 } 826 }) 827 828 Q6INSN(A2_vsubws,"Rdd32=vsubw(Rtt32,Rss32):sat",ATTRIBS(), 829 "Sub vector of words with saturation", 830 { 831 fHIDE(int i;) 832 for (i=0;i<2;i++) { 833 fSETWORD(i,RddV,fSATN(32,fGETWORD(i,RttV)-fGETWORD(i,RssV))); 834 } 835 }) 836 837 838 839 840 /**********************************************/ 841 /* Vector Abs */ 842 /**********************************************/ 843 844 Q6INSN(A2_vabsh,"Rdd32=vabsh(Rss32)",ATTRIBS(), 845 "Negate vector of half integers", 846 { 847 fHIDE(int i;) 848 for (i=0;i<4;i++) { 849 fSETHALF(i,RddV,fABS(fGETHALF(i,RssV))); 850 } 851 }) 852 853 Q6INSN(A2_vabshsat,"Rdd32=vabsh(Rss32):sat",ATTRIBS(), 854 "Negate vector of half integers", 855 { 856 fHIDE(int i;) 857 for (i=0;i<4;i++) { 858 fSETHALF(i,RddV,fSATH(fABS(fGETHALF(i,RssV)))); 859 } 860 }) 861 862 Q6INSN(A2_vabsw,"Rdd32=vabsw(Rss32)",ATTRIBS(), 863 "Absolute Value vector of words", 864 { 865 fHIDE(int i;) 866 for (i=0;i<2;i++) { 867 fSETWORD(i,RddV,fABS(fGETWORD(i,RssV))); 868 } 869 }) 870 871 Q6INSN(A2_vabswsat,"Rdd32=vabsw(Rss32):sat",ATTRIBS(), 872 "Absolute Value vector of words", 873 { 874 fHIDE(int i;) 875 for (i=0;i<2;i++) { 876 fSETWORD(i,RddV,fSAT(fABS(fGETWORD(i,RssV)))); 877 } 878 }) 879 880 /**********************************************/ 881 /* Vector SAD */ 882 /**********************************************/ 883 884 885 Q6INSN(M2_vabsdiffw,"Rdd32=vabsdiffw(Rtt32,Rss32)",ATTRIBS(A_ARCHV2), 886 "Absolute Differences: vector of words", 887 { 888 fHIDE(int i;) 889 for (i=0;i<2;i++) { 890 fSETWORD(i,RddV,fABS(fGETWORD(i,RttV) - fGETWORD(i,RssV))); 891 } 892 }) 893 894 Q6INSN(M2_vabsdiffh,"Rdd32=vabsdiffh(Rtt32,Rss32)",ATTRIBS(A_ARCHV2), 895 "Absolute Differences: vector of halfwords", 896 { 897 fHIDE(int i;) 898 for (i=0;i<4;i++) { 899 fSETHALF(i,RddV,fABS(fGETHALF(i,RttV) - fGETHALF(i,RssV))); 900 } 901 }) 902 903 Q6INSN(M6_vabsdiffb,"Rdd32=vabsdiffb(Rtt32,Rss32)",ATTRIBS(), 904 "Absolute Differences: vector of halfwords", 905 { 906 fHIDE(int i;) 907 for (i=0;i<8;i++) { 908 fSETBYTE(i,RddV,fABS(fGETBYTE(i,RttV) - fGETBYTE(i,RssV))); 909 } 910 }) 911 912 Q6INSN(M6_vabsdiffub,"Rdd32=vabsdiffub(Rtt32,Rss32)",ATTRIBS(), 913 "Absolute Differences: vector of halfwords", 914 { 915 fHIDE(int i;) 916 for (i=0;i<8;i++) { 917 fSETBYTE(i,RddV,fABS(fGETUBYTE(i,RttV) - fGETUBYTE(i,RssV))); 918 } 919 }) 920 921 922 923 Q6INSN(A2_vrsadub,"Rdd32=vrsadub(Rss32,Rtt32)",ATTRIBS(), 924 "Sum of Absolute Differences: vector of unsigned bytes", 925 { 926 fHIDE(int i;) 927 RddV = 0; 928 for (i = 0; i < 4; i++) { 929 fSETWORD(0,RddV,(fGETWORD(0,RddV) + fABS((fGETUBYTE(i,RssV) - fGETUBYTE(i,RttV))))); 930 } 931 for (i = 4; i < 8; i++) { 932 fSETWORD(1,RddV,(fGETWORD(1,RddV) + fABS((fGETUBYTE(i,RssV) - fGETUBYTE(i,RttV))))); 933 } 934 }) 935 936 Q6INSN(A2_vrsadub_acc,"Rxx32+=vrsadub(Rss32,Rtt32)",ATTRIBS(), 937 "Sum of Absolute Differences: vector of unsigned bytes", 938 { 939 fHIDE(int i;) 940 for (i = 0; i < 4; i++) { 941 fSETWORD(0,RxxV,(fGETWORD(0,RxxV) + fABS((fGETUBYTE(i,RssV) - fGETUBYTE(i,RttV))))); 942 } 943 for (i = 4; i < 8; i++) { 944 fSETWORD(1,RxxV,(fGETWORD(1,RxxV) + fABS((fGETUBYTE(i,RssV) - fGETUBYTE(i,RttV))))); 945 } 946 }) 947 948 949 /**********************************************/ 950 /* Vector Average */ 951 /**********************************************/ 952 953 Q6INSN(A2_vavgub,"Rdd32=vavgub(Rss32,Rtt32)",ATTRIBS(), 954 "Average vector of unsigned bytes", 955 { 956 fHIDE(int i;) 957 for (i = 0; i < 8; i++) { 958 fSETBYTE(i,RddV,((fGETUBYTE(i,RssV) + fGETUBYTE(i,RttV))>>1)); 959 } 960 }) 961 962 Q6INSN(A2_vavguh,"Rdd32=vavguh(Rss32,Rtt32)",ATTRIBS(), 963 "Average vector of unsigned halfwords", 964 { 965 fHIDE(int i;) 966 for (i=0;i<4;i++) { 967 fSETHALF(i,RddV,(fGETUHALF(i,RssV)+fGETUHALF(i,RttV))>>1); 968 } 969 }) 970 971 Q6INSN(A2_vavgh,"Rdd32=vavgh(Rss32,Rtt32)",ATTRIBS(), 972 "Average vector of halfwords", 973 { 974 fHIDE(int i;) 975 for (i=0;i<4;i++) { 976 fSETHALF(i,RddV,(fGETHALF(i,RssV)+fGETHALF(i,RttV))>>1); 977 } 978 }) 979 980 Q6INSN(A2_vnavgh,"Rdd32=vnavgh(Rtt32,Rss32)",ATTRIBS(), 981 "Negative Average vector of halfwords", 982 { 983 fHIDE(int i;) 984 for (i=0;i<4;i++) { 985 fSETHALF(i,RddV,(fGETHALF(i,RttV)-fGETHALF(i,RssV))>>1); 986 } 987 }) 988 989 Q6INSN(A2_vavgw,"Rdd32=vavgw(Rss32,Rtt32)",ATTRIBS(), 990 "Average vector of words", 991 { 992 fHIDE(int i;) 993 for (i=0;i<2;i++) { 994 fSETWORD(i,RddV,(fSXTN(32,33,fGETWORD(i,RssV))+fSXTN(32,33,fGETWORD(i,RttV)))>>1); 995 } 996 }) 997 998 Q6INSN(A2_vnavgw,"Rdd32=vnavgw(Rtt32,Rss32)",ATTRIBS(A_ARCHV2), 999 "Average vector of words", 1000 { 1001 fHIDE(int i;) 1002 for (i=0;i<2;i++) { 1003 fSETWORD(i,RddV,(fSXTN(32,33,fGETWORD(i,RttV))-fSXTN(32,33,fGETWORD(i,RssV)))>>1); 1004 } 1005 }) 1006 1007 Q6INSN(A2_vavgwr,"Rdd32=vavgw(Rss32,Rtt32):rnd",ATTRIBS(), 1008 "Average vector of words", 1009 { 1010 fHIDE(int i;) 1011 for (i=0;i<2;i++) { 1012 fSETWORD(i,RddV,(fSXTN(32,33,fGETWORD(i,RssV))+fSXTN(32,33,fGETWORD(i,RttV))+1)>>1); 1013 } 1014 }) 1015 1016 Q6INSN(A2_vnavgwr,"Rdd32=vnavgw(Rtt32,Rss32):rnd:sat",ATTRIBS(A_ARCHV2), 1017 "Average vector of words", 1018 { 1019 fHIDE(int i;) 1020 for (i=0;i<2;i++) { 1021 fSETWORD(i,RddV,fSAT((fSXTN(32,33,fGETWORD(i,RttV))-fSXTN(32,33,fGETWORD(i,RssV))+1)>>1)); 1022 } 1023 }) 1024 1025 Q6INSN(A2_vavgwcr,"Rdd32=vavgw(Rss32,Rtt32):crnd",ATTRIBS(A_ARCHV2), 1026 "Average vector of words with convergent rounding", 1027 { 1028 fHIDE(int i;) 1029 for (i=0;i<2;i++) { 1030 fSETWORD(i,RddV,(fCRND(fSXTN(32,33,fGETWORD(i,RssV))+fSXTN(32,33,fGETWORD(i,RttV)))>>1)); 1031 } 1032 }) 1033 1034 Q6INSN(A2_vnavgwcr,"Rdd32=vnavgw(Rtt32,Rss32):crnd:sat",ATTRIBS(A_ARCHV2), 1035 "Average negative vector of words with convergent rounding", 1036 { 1037 fHIDE(int i;) 1038 for (i=0;i<2;i++) { 1039 fSETWORD(i,RddV,fSAT(fCRND(fSXTN(32,33,fGETWORD(i,RttV))-fSXTN(32,33,fGETWORD(i,RssV)))>>1)); 1040 } 1041 }) 1042 1043 Q6INSN(A2_vavghcr,"Rdd32=vavgh(Rss32,Rtt32):crnd",ATTRIBS(A_ARCHV2), 1044 "Average vector of halfwords with conv rounding", 1045 { 1046 fHIDE(int i;) 1047 for (i=0;i<4;i++) { 1048 fSETHALF(i,RddV,fCRND(fGETHALF(i,RssV)+fGETHALF(i,RttV))>>1); 1049 } 1050 }) 1051 1052 Q6INSN(A2_vnavghcr,"Rdd32=vnavgh(Rtt32,Rss32):crnd:sat",ATTRIBS(A_ARCHV2), 1053 "Average negative vector of halfwords with conv rounding", 1054 { 1055 fHIDE(int i;) 1056 for (i=0;i<4;i++) { 1057 fSETHALF(i,RddV,fSATH(fCRND(fGETHALF(i,RttV)-fGETHALF(i,RssV))>>1)); 1058 } 1059 }) 1060 1061 1062 Q6INSN(A2_vavguw,"Rdd32=vavguw(Rss32,Rtt32)",ATTRIBS(), 1063 "Average vector of unsigned words", 1064 { 1065 fHIDE(int i;) 1066 for (i=0;i<2;i++) { 1067 fSETWORD(i,RddV,(fZXTN(32,33,fGETUWORD(i,RssV))+fZXTN(32,33,fGETUWORD(i,RttV)))>>1); 1068 } 1069 }) 1070 1071 Q6INSN(A2_vavguwr,"Rdd32=vavguw(Rss32,Rtt32):rnd",ATTRIBS(), 1072 "Average vector of unsigned words", 1073 { 1074 fHIDE(int i;) 1075 for (i=0;i<2;i++) { 1076 fSETWORD(i,RddV,(fZXTN(32,33,fGETUWORD(i,RssV))+fZXTN(32,33,fGETUWORD(i,RttV))+1)>>1); 1077 } 1078 }) 1079 1080 Q6INSN(A2_vavgubr,"Rdd32=vavgub(Rss32,Rtt32):rnd",ATTRIBS(), 1081 "Average vector of unsigned bytes", 1082 { 1083 fHIDE(int i;) 1084 for (i = 0; i < 8; i++) { 1085 fSETBYTE(i,RddV,((fGETUBYTE(i,RssV)+fGETUBYTE(i,RttV)+1)>>1)); 1086 } 1087 }) 1088 1089 Q6INSN(A2_vavguhr,"Rdd32=vavguh(Rss32,Rtt32):rnd",ATTRIBS(), 1090 "Average vector of unsigned halfwords with rounding", 1091 { 1092 fHIDE(int i;) 1093 for (i=0;i<4;i++) { 1094 fSETHALF(i,RddV,(fGETUHALF(i,RssV)+fGETUHALF(i,RttV)+1)>>1); 1095 } 1096 }) 1097 1098 Q6INSN(A2_vavghr,"Rdd32=vavgh(Rss32,Rtt32):rnd",ATTRIBS(), 1099 "Average vector of halfwords with rounding", 1100 { 1101 fHIDE(int i;) 1102 for (i=0;i<4;i++) { 1103 fSETHALF(i,RddV,(fGETHALF(i,RssV)+fGETHALF(i,RttV)+1)>>1); 1104 } 1105 }) 1106 1107 Q6INSN(A2_vnavghr,"Rdd32=vnavgh(Rtt32,Rss32):rnd:sat",ATTRIBS(A_ARCHV2), 1108 "Negative Average vector of halfwords with rounding", 1109 { 1110 fHIDE(int i;) 1111 for (i=0;i<4;i++) { 1112 fSETHALF(i,RddV,fSATH((fGETHALF(i,RttV)-fGETHALF(i,RssV)+1)>>1)); 1113 } 1114 }) 1115 1116 1117 /* Rounding Instruction */ 1118 1119 Q6INSN(A4_round_ri,"Rd32=round(Rs32,#u5)",ATTRIBS(),"Round", {RdV = fRNDN(RsV,uiV)>>uiV; }) 1120 Q6INSN(A4_round_rr,"Rd32=round(Rs32,Rt32)",ATTRIBS(),"Round", {RdV = fRNDN(RsV,fZXTN(5,32,RtV))>>fZXTN(5,32,RtV); }) 1121 Q6INSN(A4_round_ri_sat,"Rd32=round(Rs32,#u5):sat",ATTRIBS(),"Round", {RdV = (fSAT(fRNDN(RsV,uiV)))>>uiV; }) 1122 Q6INSN(A4_round_rr_sat,"Rd32=round(Rs32,Rt32):sat",ATTRIBS(),"Round", {RdV = (fSAT(fRNDN(RsV,fZXTN(5,32,RtV))))>>fZXTN(5,32,RtV); }) 1123 1124 1125 Q6INSN(A4_cround_ri,"Rd32=cround(Rs32,#u5)",ATTRIBS(),"Convergent Round", {RdV = fCRNDN(RsV,uiV); }) 1126 Q6INSN(A4_cround_rr,"Rd32=cround(Rs32,Rt32)",ATTRIBS(),"Convergent Round", {RdV = fCRNDN(RsV,fZXTN(5,32,RtV)); }) 1127 1128 1129 #define CROUND(DST,SRC,SHIFT) \ 1130 fHIDE(size16s_t rndbit_128;)\ 1131 fHIDE(size16s_t tmp128;)\ 1132 fHIDE(size16s_t src_128;)\ 1133 if (SHIFT == 0) { \ 1134 DST = SRC;\ 1135 } else if ((SRC & (size8s_t)((1LL << (SHIFT - 1)) - 1LL)) == 0) { \ 1136 src_128 = fCAST8S_16S(SRC);\ 1137 rndbit_128 = fCAST8S_16S(1LL);\ 1138 rndbit_128 = fSHIFTL128(rndbit_128, SHIFT);\ 1139 rndbit_128 = fAND128(rndbit_128, src_128);\ 1140 rndbit_128 = fSHIFTR128(rndbit_128, 1);\ 1141 tmp128 = fADD128(src_128, rndbit_128);\ 1142 tmp128 = fSHIFTR128(tmp128, SHIFT);\ 1143 DST = fCAST16S_8S(tmp128);\ 1144 } else {\ 1145 size16s_t rndbit_128 = fCAST8S_16S((1LL << (SHIFT - 1))); \ 1146 size16s_t src_128 = fCAST8S_16S(SRC); \ 1147 size16s_t tmp128 = fADD128(src_128, rndbit_128);\ 1148 tmp128 = fSHIFTR128(tmp128, SHIFT);\ 1149 DST = fCAST16S_8S(tmp128);\ 1150 } 1151 1152 Q6INSN(A7_croundd_ri,"Rdd32=cround(Rss32,#u6)",ATTRIBS(),"Convergent Round", 1153 { 1154 CROUND(RddV,RssV,uiV); 1155 }) 1156 1157 Q6INSN(A7_croundd_rr,"Rdd32=cround(Rss32,Rt32)",ATTRIBS(),"Convergent Round", 1158 { 1159 CROUND(RddV,RssV,fZXTN(6,32,RtV)); 1160 }) 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 Q6INSN(A7_clip,"Rd32=clip(Rs32,#u5)",ATTRIBS(),"Clip to #s5", { fCLIP(RdV,RsV,uiV);}) 1171 Q6INSN(A7_vclip,"Rdd32=vclip(Rss32,#u5)",ATTRIBS(),"Clip to #s5", 1172 { 1173 fHIDE(size4s_t tmp;) 1174 fCLIP(tmp, fGETWORD(0, RssV), uiV); 1175 fSETWORD(0, RddV, tmp); 1176 fCLIP(tmp,fGETWORD(1, RssV), uiV); 1177 fSETWORD(1, RddV, tmp); 1178 } 1179 ) 1180 1181 1182 1183 /**********************************************/ 1184 /* V4: Cross Vector Min/Max */ 1185 /**********************************************/ 1186 1187 1188 #define VRMINORMAX(TAG,STR,OP,SHORTTYPE,SETTYPE,GETTYPE,NEL,SHIFT) \ 1189 Q6INSN(A4_vr##TAG##SHORTTYPE,"Rxx32=vr"#TAG#SHORTTYPE"(Rss32,Ru32)",ATTRIBS(), \ 1190 "Choose " STR " elements of a vector", \ 1191 { \ 1192 fHIDE(int i; size8s_t TAG; size4s_t addr;) \ 1193 TAG = fGET##GETTYPE(0,RxxV); \ 1194 addr = fGETWORD(1,RxxV); \ 1195 for (i = 0; i < NEL; i++) { \ 1196 if (TAG OP fGET##GETTYPE(i,RssV)) { \ 1197 TAG = fGET##GETTYPE(i,RssV); \ 1198 addr = RuV | i<<SHIFT; \ 1199 } \ 1200 } \ 1201 fSETWORD(0,RxxV,TAG); \ 1202 fSETWORD(1,RxxV,addr); \ 1203 }) 1204 1205 #define RMINMAX(SHORTTYPE,SETTYPE,GETTYPE,NEL,SHIFT) \ 1206 VRMINORMAX(min,"minimum",>,SHORTTYPE,SETTYPE,GETTYPE,NEL,SHIFT) \ 1207 VRMINORMAX(max,"maximum",<,SHORTTYPE,SETTYPE,GETTYPE,NEL,SHIFT) 1208 1209 1210 RMINMAX(h,HALF,HALF,4,1) 1211 RMINMAX(uh,HALF,UHALF,4,1) 1212 RMINMAX(w,WORD,WORD,2,2) 1213 RMINMAX(uw,WORD,UWORD,2,2) 1214 1215 #undef RMINMAX 1216 #undef VRMINORMAX 1217 1218 /**********************************************/ 1219 /* Vector Min/Max */ 1220 /**********************************************/ 1221 1222 #define VMINORMAX(TAG,STR,FUNC,SHORTTYPE,SETTYPE,GETTYPE,NEL) \ 1223 Q6INSN(A2_v##TAG##SHORTTYPE,"Rdd32=v"#TAG#SHORTTYPE"(Rtt32,Rss32)",ATTRIBS(), \ 1224 "Choose " STR " elements of two vectors", \ 1225 { \ 1226 fHIDE(int i;) \ 1227 for (i = 0; i < NEL; i++) { \ 1228 fSET##SETTYPE(i,RddV,FUNC(fGET##GETTYPE(i,RttV),fGET##GETTYPE(i,RssV))); \ 1229 } \ 1230 }) 1231 1232 #define VMINORMAX3(TAG,STR,FUNC,SHORTTYPE,SETTYPE,GETTYPE,NEL) \ 1233 Q6INSN(A6_v##TAG##SHORTTYPE##3,"Rxx32=v"#TAG#SHORTTYPE"3(Rtt32,Rss32)",ATTRIBS(), \ 1234 "Choose " STR " elements of two vectors", \ 1235 { \ 1236 fHIDE(int i;) \ 1237 for (i = 0; i < NEL; i++) { \ 1238 fSET##SETTYPE(i,RxxV,FUNC(fGET##GETTYPE(i,RxxV),FUNC(fGET##GETTYPE(i,RttV),fGET##GETTYPE(i,RssV)))); \ 1239 } \ 1240 }) 1241 1242 #define MINMAX(SHORTTYPE,SETTYPE,GETTYPE,NEL) \ 1243 VMINORMAX(min,"minimum",fMIN,SHORTTYPE,SETTYPE,GETTYPE,NEL) \ 1244 VMINORMAX(max,"maximum",fMAX,SHORTTYPE,SETTYPE,GETTYPE,NEL) 1245 1246 MINMAX(b,BYTE,BYTE,8) 1247 MINMAX(ub,BYTE,UBYTE,8) 1248 MINMAX(h,HALF,HALF,4) 1249 MINMAX(uh,HALF,UHALF,4) 1250 MINMAX(w,WORD,WORD,2) 1251 MINMAX(uw,WORD,UWORD,2) 1252 1253 #undef MINMAX 1254 #undef VMINORMAX 1255 #undef VMINORMAX3 1256 1257 1258 Q6INSN(A5_ACS,"Rxx32,Pe4=vacsh(Rss32,Rtt32)",ATTRIBS(), 1259 "Add Compare and Select elements of two vectors, record the maximums and the decisions ", 1260 { 1261 fHIDE(int i;) 1262 fHIDE(int xv;) 1263 fHIDE(int sv;) 1264 fHIDE(int tv;) 1265 for (i = 0; i < 4; i++) { 1266 xv = (int) fGETHALF(i,RxxV); 1267 sv = (int) fGETHALF(i,RssV); 1268 tv = (int) fGETHALF(i,RttV); 1269 xv = xv + tv; //assumes 17bit datapath 1270 sv = sv - tv; //assumes 17bit datapath 1271 fSETBIT(i*2, PeV, (xv > sv)); 1272 fSETBIT(i*2+1,PeV, (xv > sv)); 1273 fSETHALF(i, RxxV, fSATH(fMAX(xv,sv))); 1274 } 1275 }) 1276 1277 Q6INSN(A6_vminub_RdP,"Rdd32,Pe4=vminub(Rtt32,Rss32)",ATTRIBS(), 1278 "Vector minimum of bytes, records minimum and decision vector", 1279 { 1280 fHIDE(int i;) 1281 for (i = 0; i < 8; i++) { 1282 fSETBIT(i, PeV, (fGETUBYTE(i,RttV) > fGETUBYTE(i,RssV))); 1283 fSETBYTE(i,RddV,fMIN(fGETUBYTE(i,RttV),fGETUBYTE(i,RssV))); 1284 } 1285 }) 1286 1287 /**********************************************/ 1288 /* Vector Min/Max */ 1289 /**********************************************/ 1290 1291 1292 Q6INSN(A4_modwrapu,"Rd32=modwrap(Rs32,Rt32)",ATTRIBS(), 1293 "Wrap to an unsigned modulo buffer", 1294 { 1295 if (RsV < 0) { 1296 RdV = RsV + fCAST4u(RtV); 1297 } else if (fCAST4u(RsV) >= fCAST4u(RtV)) { 1298 RdV = RsV - fCAST4u(RtV); 1299 } else { 1300 RdV = RsV; 1301 } 1302 })