qemu

FORK: QEMU emulator
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cmsdk-apb-dualtimer.h (2118B)

      1 /*
      2  * ARM CMSDK APB dual-timer emulation
      3  *
      4  * Copyright (c) 2018 Linaro Limited
      5  * Written by Peter Maydell
      6  *
      7  *  This program is free software; you can redistribute it and/or modify
      8  *  it under the terms of the GNU General Public License version 2 or
      9  *  (at your option) any later version.
     10  */
     11 
     12 /*
     13  * This is a model of the "APB dual-input timer" which is part of the Cortex-M
     14  * System Design Kit (CMSDK) and documented in the Cortex-M System
     15  * Design Kit Technical Reference Manual (ARM DDI0479C):
     16  * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
     17  *
     18  * QEMU interface:
     19  *  + Clock input "TIMCLK": clock (for both timers)
     20  *  + sysbus MMIO region 0: the register bank
     21  *  + sysbus IRQ 0: combined timer interrupt TIMINTC
     22  *  + sysbus IRO 1: timer block 1 interrupt TIMINT1
     23  *  + sysbus IRQ 2: timer block 2 interrupt TIMINT2
     24  */
     25 
     26 #ifndef CMSDK_APB_DUALTIMER_H
     27 #define CMSDK_APB_DUALTIMER_H
     28 
     29 #include "hw/sysbus.h"
     30 #include "hw/ptimer.h"
     31 #include "hw/clock.h"
     32 #include "qom/object.h"
     33 
     34 #define TYPE_CMSDK_APB_DUALTIMER "cmsdk-apb-dualtimer"
     35 OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER)
     36 
     37 
     38 /* One of the two identical timer modules in the dual-timer module */
     39 typedef struct CMSDKAPBDualTimerModule {
     40     CMSDKAPBDualTimer *parent;
     41     struct ptimer_state *timer;
     42     qemu_irq timerint;
     43     /*
     44      * We must track the guest LOAD and VALUE register state by hand
     45      * rather than leaving this state only in the ptimer limit/count,
     46      * because if CONTROL.SIZE is 0 then only the low 16 bits of the
     47      * counter actually counts, but the high half is still guest
     48      * accessible.
     49      */
     50     uint32_t load;
     51     uint32_t value;
     52     uint32_t control;
     53     uint32_t intstatus;
     54 } CMSDKAPBDualTimerModule;
     55 
     56 #define CMSDK_APB_DUALTIMER_NUM_MODULES 2
     57 
     58 struct CMSDKAPBDualTimer {
     59     /*< private >*/
     60     SysBusDevice parent_obj;
     61 
     62     /*< public >*/
     63     MemoryRegion iomem;
     64     qemu_irq timerintc;
     65     Clock *timclk;
     66 
     67     CMSDKAPBDualTimerModule timermod[CMSDK_APB_DUALTIMER_NUM_MODULES];
     68     uint32_t timeritcr;
     69     uint32_t timeritop;
     70 };
     71 
     72 #endif