qemu

FORK: QEMU emulator
git clone https://git.neptards.moe/neptards/qemu.git
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mss-spi.h (1739B)

      1 /*
      2  * Microsemi SmartFusion2 SPI
      3  *
      4  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a copy
      7  * of this software and associated documentation files (the "Software"), to deal
      8  * in the Software without restriction, including without limitation the rights
      9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10  * copies of the Software, and to permit persons to whom the Software is
     11  * furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22  * THE SOFTWARE.
     23  */
     24 
     25 #ifndef HW_MSS_SPI_H
     26 #define HW_MSS_SPI_H
     27 
     28 #include "hw/sysbus.h"
     29 #include "hw/ssi/ssi.h"
     30 #include "qemu/fifo32.h"
     31 #include "qom/object.h"
     32 
     33 #define TYPE_MSS_SPI   "mss-spi"
     34 OBJECT_DECLARE_SIMPLE_TYPE(MSSSpiState, MSS_SPI)
     35 
     36 #define R_SPI_MAX             16
     37 
     38 struct MSSSpiState {
     39     SysBusDevice parent_obj;
     40 
     41     MemoryRegion mmio;
     42 
     43     qemu_irq irq;
     44 
     45     qemu_irq cs_line;
     46 
     47     SSIBus *spi;
     48 
     49     Fifo32 rx_fifo;
     50     Fifo32 tx_fifo;
     51 
     52     int fifo_depth;
     53     uint32_t frame_count;
     54     bool enabled;
     55 
     56     uint32_t regs[R_SPI_MAX];
     57 };
     58 
     59 #endif /* HW_MSS_SPI_H */