qemu

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macio.h (3925B)

      1 /*
      2  * PowerMac MacIO device emulation
      3  *
      4  * Copyright (c) 2005-2007 Fabrice Bellard
      5  * Copyright (c) 2007 Jocelyn Mayer
      6  *
      7  * Permission is hereby granted, free of charge, to any person obtaining a copy
      8  * of this software and associated documentation files (the "Software"), to deal
      9  * in the Software without restriction, including without limitation the rights
     10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     11  * copies of the Software, and to permit persons to whom the Software is
     12  * furnished to do so, subject to the following conditions:
     13  *
     14  * The above copyright notice and this permission notice shall be included in
     15  * all copies or substantial portions of the Software.
     16  *
     17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     23  * THE SOFTWARE.
     24  */
     25 
     26 #ifndef MACIO_H
     27 #define MACIO_H
     28 
     29 #include "hw/char/escc.h"
     30 #include "hw/pci/pci.h"
     31 #include "hw/ide/internal.h"
     32 #include "hw/intc/heathrow_pic.h"
     33 #include "hw/misc/macio/cuda.h"
     34 #include "hw/misc/macio/gpio.h"
     35 #include "hw/misc/macio/pmu.h"
     36 #include "hw/nvram/mac_nvram.h"
     37 #include "hw/ppc/mac_dbdma.h"
     38 #include "hw/ppc/openpic.h"
     39 #include "qom/object.h"
     40 
     41 /* Old World IRQs */
     42 #define OLDWORLD_CUDA_IRQ      0x12
     43 #define OLDWORLD_ESCCB_IRQ     0x10
     44 #define OLDWORLD_ESCCA_IRQ     0xf
     45 #define OLDWORLD_IDE0_IRQ      0xd
     46 #define OLDWORLD_IDE0_DMA_IRQ  0x2
     47 #define OLDWORLD_IDE1_IRQ      0xe
     48 #define OLDWORLD_IDE1_DMA_IRQ  0x3
     49 
     50 /* New World IRQs */
     51 #define NEWWORLD_CUDA_IRQ      0x19
     52 #define NEWWORLD_PMU_IRQ       0x19
     53 #define NEWWORLD_ESCCB_IRQ     0x24
     54 #define NEWWORLD_ESCCA_IRQ     0x25
     55 #define NEWWORLD_IDE0_IRQ      0xd
     56 #define NEWWORLD_IDE0_DMA_IRQ  0x2
     57 #define NEWWORLD_IDE1_IRQ      0xe
     58 #define NEWWORLD_IDE1_DMA_IRQ  0x3
     59 #define NEWWORLD_EXTING_GPIO1  0x2f
     60 #define NEWWORLD_EXTING_GPIO9  0x37
     61 
     62 /* MacIO virtual bus */
     63 #define TYPE_MACIO_BUS "macio-bus"
     64 OBJECT_DECLARE_SIMPLE_TYPE(MacIOBusState, MACIO_BUS)
     65 
     66 struct MacIOBusState {
     67     /*< private >*/
     68     BusState parent_obj;
     69 };
     70 
     71 /* MacIO IDE */
     72 #define TYPE_MACIO_IDE "macio-ide"
     73 OBJECT_DECLARE_SIMPLE_TYPE(MACIOIDEState, MACIO_IDE)
     74 
     75 struct MACIOIDEState {
     76     /*< private >*/
     77     SysBusDevice parent_obj;
     78     /*< public >*/
     79     uint32_t addr;
     80     uint32_t channel;
     81     qemu_irq real_ide_irq;
     82     qemu_irq real_dma_irq;
     83     qemu_irq ide_irq;
     84     qemu_irq dma_irq;
     85 
     86     MemoryRegion mem;
     87     IDEBus bus;
     88     IDEDMA dma;
     89     void *dbdma;
     90     bool dma_active;
     91     uint32_t timing_reg;
     92     uint32_t irq_reg;
     93 };
     94 
     95 void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
     96 void macio_ide_register_dma(MACIOIDEState *ide);
     97 
     98 #define TYPE_MACIO "macio"
     99 OBJECT_DECLARE_SIMPLE_TYPE(MacIOState, MACIO)
    100 
    101 struct MacIOState {
    102     /*< private >*/
    103     PCIDevice parent;
    104     /*< public >*/
    105 
    106     MacIOBusState macio_bus;
    107     MemoryRegion bar;
    108     CUDAState cuda;
    109     PMUState pmu;
    110     DBDMAState dbdma;
    111     ESCCState escc;
    112     uint64_t frequency;
    113 };
    114 
    115 #define TYPE_OLDWORLD_MACIO "macio-oldworld"
    116 OBJECT_DECLARE_SIMPLE_TYPE(OldWorldMacIOState, OLDWORLD_MACIO)
    117 
    118 struct OldWorldMacIOState {
    119     /*< private >*/
    120     MacIOState parent_obj;
    121     /*< public >*/
    122 
    123     HeathrowState pic;
    124 
    125     MacIONVRAMState nvram;
    126     MACIOIDEState ide[2];
    127 };
    128 
    129 #define TYPE_NEWWORLD_MACIO "macio-newworld"
    130 OBJECT_DECLARE_SIMPLE_TYPE(NewWorldMacIOState, NEWWORLD_MACIO)
    131 
    132 struct NewWorldMacIOState {
    133     /*< private >*/
    134     MacIOState parent_obj;
    135     /*< public >*/
    136 
    137     bool has_pmu;
    138     bool has_adb;
    139     OpenPICState pic;
    140     MACIOIDEState ide[2];
    141     MacIOGPIOState gpio;
    142 };
    143 
    144 #endif /* MACIO_H */