qemu

FORK: QEMU emulator
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imx_avic.h (1474B)

      1 /*
      2  * i.MX31 Vectored Interrupt Controller
      3  *
      4  * Note this is NOT the PL192 provided by ARM, but
      5  * a custom implementation by Freescale.
      6  *
      7  * Copyright (c) 2008 OKL
      8  * Copyright (c) 2011 NICTA Pty Ltd
      9  * Originally written by Hans Jiang
     10  * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
     11  *
     12  * This code is licensed under the GPL version 2 or later.  See
     13  * the COPYING file in the top-level directory.
     14  *
     15  * TODO: implement vectors.
     16  */
     17 #ifndef IMX_AVIC_H
     18 #define IMX_AVIC_H
     19 
     20 #include "hw/sysbus.h"
     21 #include "qom/object.h"
     22 
     23 #define TYPE_IMX_AVIC "imx.avic"
     24 OBJECT_DECLARE_SIMPLE_TYPE(IMXAVICState, IMX_AVIC)
     25 
     26 #define IMX_AVIC_NUM_IRQS 64
     27 
     28 /* Interrupt Control Bits */
     29 #define ABFLAG (1<<25)
     30 #define ABFEN  (1<<24)
     31 #define NIDIS  (1<<22) /* Normal Interrupt disable */
     32 #define FIDIS  (1<<21) /* Fast interrupt disable */
     33 #define NIAD   (1<<20) /* Normal Interrupt Arbiter Rise ARM level */
     34 #define FIAD   (1<<19) /* Fast Interrupt Arbiter Rise ARM level */
     35 #define NM     (1<<18) /* Normal interrupt mode */
     36 
     37 #define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4)
     38 #define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD)
     39 
     40 struct IMXAVICState {
     41     /*< private >*/
     42     SysBusDevice parent_obj;
     43 
     44     /*< public >*/
     45     MemoryRegion iomem;
     46     uint64_t pending;
     47     uint64_t enabled;
     48     uint64_t is_fiq;
     49     uint32_t intcntl;
     50     uint32_t intmask;
     51     qemu_irq irq;
     52     qemu_irq fiq;
     53     uint32_t prio[PRIO_WORDS]; /* Priorities are 4-bits each */
     54 };
     55 
     56 #endif /* IMX_AVIC_H */