qemu

FORK: QEMU emulator
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xlnx-zdma.h (2359B)

      1 /*
      2  * QEMU model of the ZynqMP generic DMA
      3  *
      4  * Copyright (c) 2014 Xilinx Inc.
      5  * Copyright (c) 2018 FEIMTECH AB
      6  *
      7  * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>,
      8  *            Francisco Iglesias <francisco.iglesias@feimtech.se>
      9  *
     10  * Permission is hereby granted, free of charge, to any person obtaining a copy
     11  * of this software and associated documentation files (the "Software"), to deal
     12  * in the Software without restriction, including without limitation the rights
     13  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     14  * copies of the Software, and to permit persons to whom the Software is
     15  * furnished to do so, subject to the following conditions:
     16  *
     17  * The above copyright notice and this permission notice shall be included in
     18  * all copies or substantial portions of the Software.
     19  *
     20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     23  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     25  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     26  * THE SOFTWARE.
     27  */
     28 
     29 #ifndef XLNX_ZDMA_H
     30 #define XLNX_ZDMA_H
     31 
     32 #include "hw/sysbus.h"
     33 #include "hw/register.h"
     34 #include "sysemu/dma.h"
     35 #include "qom/object.h"
     36 
     37 #define ZDMA_R_MAX (0x204 / 4)
     38 
     39 typedef enum {
     40     DISABLED = 0,
     41     ENABLED = 1,
     42     PAUSED = 2,
     43 } XlnxZDMAState;
     44 
     45 typedef union {
     46     struct {
     47         uint64_t addr;
     48         uint32_t size;
     49         uint32_t attr;
     50     };
     51     uint32_t words[4];
     52 } XlnxZDMADescr;
     53 
     54 struct XlnxZDMA {
     55     SysBusDevice parent_obj;
     56     MemoryRegion iomem;
     57     MemTxAttrs attr;
     58     MemoryRegion *dma_mr;
     59     AddressSpace dma_as;
     60     qemu_irq irq_zdma_ch_imr;
     61 
     62     struct {
     63         uint32_t bus_width;
     64     } cfg;
     65 
     66     XlnxZDMAState state;
     67     bool error;
     68 
     69     XlnxZDMADescr dsc_src;
     70     XlnxZDMADescr dsc_dst;
     71 
     72     uint32_t regs[ZDMA_R_MAX];
     73     RegisterInfo regs_info[ZDMA_R_MAX];
     74 
     75     /* We don't model the common bufs. Must be at least 16 bytes
     76        to model write only mode.  */
     77     uint8_t buf[2048];
     78 };
     79 
     80 #define TYPE_XLNX_ZDMA "xlnx.zdma"
     81 
     82 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZDMA, XLNX_ZDMA)
     83 
     84 #endif /* XLNX_ZDMA_H */