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stm32f2xx_usart.h (2442B)

      1 /*
      2  * STM32F2XX USART
      3  *
      4  * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a copy
      7  * of this software and associated documentation files (the "Software"), to deal
      8  * in the Software without restriction, including without limitation the rights
      9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10  * copies of the Software, and to permit persons to whom the Software is
     11  * furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22  * THE SOFTWARE.
     23  */
     24 
     25 #ifndef HW_STM32F2XX_USART_H
     26 #define HW_STM32F2XX_USART_H
     27 
     28 #include "hw/sysbus.h"
     29 #include "chardev/char-fe.h"
     30 #include "qom/object.h"
     31 
     32 #define USART_SR   0x00
     33 #define USART_DR   0x04
     34 #define USART_BRR  0x08
     35 #define USART_CR1  0x0C
     36 #define USART_CR2  0x10
     37 #define USART_CR3  0x14
     38 #define USART_GTPR 0x18
     39 
     40 /*
     41  * NB: The reset value mentioned in "24.6.1 Status register" seems bogus.
     42  * Looking at "Table 98 USART register map and reset values", it seems it
     43  * should be 0xc0, and that's how real hardware behaves.
     44  */
     45 #define USART_SR_RESET (USART_SR_TXE | USART_SR_TC)
     46 
     47 #define USART_SR_TXE  (1 << 7)
     48 #define USART_SR_TC   (1 << 6)
     49 #define USART_SR_RXNE (1 << 5)
     50 
     51 #define USART_CR1_UE  (1 << 13)
     52 #define USART_CR1_RXNEIE  (1 << 5)
     53 #define USART_CR1_TE  (1 << 3)
     54 #define USART_CR1_RE  (1 << 2)
     55 
     56 #define TYPE_STM32F2XX_USART "stm32f2xx-usart"
     57 OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXUsartState, STM32F2XX_USART)
     58 
     59 struct STM32F2XXUsartState {
     60     /* <private> */
     61     SysBusDevice parent_obj;
     62 
     63     /* <public> */
     64     MemoryRegion mmio;
     65 
     66     uint32_t usart_sr;
     67     uint32_t usart_dr;
     68     uint32_t usart_brr;
     69     uint32_t usart_cr1;
     70     uint32_t usart_cr2;
     71     uint32_t usart_cr3;
     72     uint32_t usart_gtpr;
     73 
     74     CharBackend chr;
     75     qemu_irq irq;
     76 };
     77 #endif /* HW_STM32F2XX_USART_H */