sifive_uart.h (2279B)
1 /* 2 * SiFive UART interface 3 * 4 * Copyright (c) 2016 Stefan O'Rear 5 * Copyright (c) 2017 SiFive, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2 or later, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef HW_SIFIVE_UART_H 21 #define HW_SIFIVE_UART_H 22 23 #include "chardev/char-fe.h" 24 #include "hw/qdev-properties.h" 25 #include "hw/sysbus.h" 26 #include "qom/object.h" 27 28 enum { 29 SIFIVE_UART_TXFIFO = 0, 30 SIFIVE_UART_RXFIFO = 4, 31 SIFIVE_UART_TXCTRL = 8, 32 SIFIVE_UART_TXMARK = 10, 33 SIFIVE_UART_RXCTRL = 12, 34 SIFIVE_UART_RXMARK = 14, 35 SIFIVE_UART_IE = 16, 36 SIFIVE_UART_IP = 20, 37 SIFIVE_UART_DIV = 24, 38 SIFIVE_UART_MAX = 32 39 }; 40 41 enum { 42 SIFIVE_UART_IE_TXWM = 1, /* Transmit watermark interrupt enable */ 43 SIFIVE_UART_IE_RXWM = 2 /* Receive watermark interrupt enable */ 44 }; 45 46 enum { 47 SIFIVE_UART_IP_TXWM = 1, /* Transmit watermark interrupt pending */ 48 SIFIVE_UART_IP_RXWM = 2 /* Receive watermark interrupt pending */ 49 }; 50 51 #define SIFIVE_UART_GET_TXCNT(txctrl) ((txctrl >> 16) & 0x7) 52 #define SIFIVE_UART_GET_RXCNT(rxctrl) ((rxctrl >> 16) & 0x7) 53 #define SIFIVE_UART_RX_FIFO_SIZE 8 54 55 #define TYPE_SIFIVE_UART "riscv.sifive.uart" 56 OBJECT_DECLARE_SIMPLE_TYPE(SiFiveUARTState, SIFIVE_UART) 57 58 struct SiFiveUARTState { 59 /*< private >*/ 60 SysBusDevice parent_obj; 61 62 /*< public >*/ 63 qemu_irq irq; 64 MemoryRegion mmio; 65 CharBackend chr; 66 uint8_t rx_fifo[SIFIVE_UART_RX_FIFO_SIZE]; 67 uint8_t rx_fifo_len; 68 uint32_t ie; 69 uint32_t ip; 70 uint32_t txctrl; 71 uint32_t rxctrl; 72 uint32_t div; 73 }; 74 75 SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base, 76 Chardev *chr, qemu_irq irq); 77 78 #endif