qemu

FORK: QEMU emulator
git clone https://git.neptards.moe/neptards/qemu.git
Log | Files | Refs | Submodules | LICENSE

allwinner-h3.h (4500B)

      1 /*
      2  * Allwinner H3 System on Chip emulation
      3  *
      4  * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
      5  *
      6  * This program is free software: you can redistribute it and/or modify
      7  * it under the terms of the GNU General Public License as published by
      8  * the Free Software Foundation, either version 2 of the License, or
      9  * (at your option) any later version.
     10  *
     11  * This program is distributed in the hope that it will be useful,
     12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14  * GNU General Public License for more details.
     15  *
     16  * You should have received a copy of the GNU General Public License
     17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
     18  */
     19 
     20 /*
     21  * The Allwinner H3 is a System on Chip containing four ARM Cortex-A7
     22  * processor cores. Features and specifications include DDR2/DDR3 memory,
     23  * SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and
     24  * various I/O modules.
     25  *
     26  * This implementation is based on the following datasheet:
     27  *
     28  *   https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
     29  *
     30  * The latest datasheet and more info can be found on the Linux Sunxi wiki:
     31  *
     32  *   https://linux-sunxi.org/H3
     33  */
     34 
     35 #ifndef HW_ARM_ALLWINNER_H3_H
     36 #define HW_ARM_ALLWINNER_H3_H
     37 
     38 #include "qom/object.h"
     39 #include "hw/arm/boot.h"
     40 #include "hw/timer/allwinner-a10-pit.h"
     41 #include "hw/intc/arm_gic.h"
     42 #include "hw/misc/allwinner-h3-ccu.h"
     43 #include "hw/misc/allwinner-cpucfg.h"
     44 #include "hw/misc/allwinner-h3-dramc.h"
     45 #include "hw/misc/allwinner-h3-sysctrl.h"
     46 #include "hw/misc/allwinner-sid.h"
     47 #include "hw/sd/allwinner-sdhost.h"
     48 #include "hw/net/allwinner-sun8i-emac.h"
     49 #include "hw/rtc/allwinner-rtc.h"
     50 #include "target/arm/cpu.h"
     51 #include "sysemu/block-backend.h"
     52 
     53 /**
     54  * Allwinner H3 device list
     55  *
     56  * This enumeration is can be used refer to a particular device in the
     57  * Allwinner H3 SoC. For example, the physical memory base address for
     58  * each device can be found in the AwH3State object in the memmap member
     59  * using the device enum value as index.
     60  *
     61  * @see AwH3State
     62  */
     63 enum {
     64     AW_H3_DEV_SRAM_A1,
     65     AW_H3_DEV_SRAM_A2,
     66     AW_H3_DEV_SRAM_C,
     67     AW_H3_DEV_SYSCTRL,
     68     AW_H3_DEV_MMC0,
     69     AW_H3_DEV_SID,
     70     AW_H3_DEV_EHCI0,
     71     AW_H3_DEV_OHCI0,
     72     AW_H3_DEV_EHCI1,
     73     AW_H3_DEV_OHCI1,
     74     AW_H3_DEV_EHCI2,
     75     AW_H3_DEV_OHCI2,
     76     AW_H3_DEV_EHCI3,
     77     AW_H3_DEV_OHCI3,
     78     AW_H3_DEV_CCU,
     79     AW_H3_DEV_PIT,
     80     AW_H3_DEV_UART0,
     81     AW_H3_DEV_UART1,
     82     AW_H3_DEV_UART2,
     83     AW_H3_DEV_UART3,
     84     AW_H3_DEV_EMAC,
     85     AW_H3_DEV_DRAMCOM,
     86     AW_H3_DEV_DRAMCTL,
     87     AW_H3_DEV_DRAMPHY,
     88     AW_H3_DEV_GIC_DIST,
     89     AW_H3_DEV_GIC_CPU,
     90     AW_H3_DEV_GIC_HYP,
     91     AW_H3_DEV_GIC_VCPU,
     92     AW_H3_DEV_RTC,
     93     AW_H3_DEV_CPUCFG,
     94     AW_H3_DEV_SDRAM
     95 };
     96 
     97 /** Total number of CPU cores in the H3 SoC */
     98 #define AW_H3_NUM_CPUS      (4)
     99 
    100 /**
    101  * Allwinner H3 object model
    102  * @{
    103  */
    104 
    105 /** Object type for the Allwinner H3 SoC */
    106 #define TYPE_AW_H3 "allwinner-h3"
    107 
    108 /** Convert input object to Allwinner H3 state object */
    109 OBJECT_DECLARE_SIMPLE_TYPE(AwH3State, AW_H3)
    110 
    111 /** @} */
    112 
    113 /**
    114  * Allwinner H3 object
    115  *
    116  * This struct contains the state of all the devices
    117  * which are currently emulated by the H3 SoC code.
    118  */
    119 struct AwH3State {
    120     /*< private >*/
    121     DeviceState parent_obj;
    122     /*< public >*/
    123 
    124     ARMCPU cpus[AW_H3_NUM_CPUS];
    125     const hwaddr *memmap;
    126     AwA10PITState timer;
    127     AwH3ClockCtlState ccu;
    128     AwCpuCfgState cpucfg;
    129     AwH3DramCtlState dramc;
    130     AwH3SysCtrlState sysctrl;
    131     AwSidState sid;
    132     AwSdHostState mmc0;
    133     AwSun8iEmacState emac;
    134     AwRtcState rtc;
    135     GICState gic;
    136     MemoryRegion sram_a1;
    137     MemoryRegion sram_a2;
    138     MemoryRegion sram_c;
    139 };
    140 
    141 /**
    142  * Emulate Boot ROM firmware setup functionality.
    143  *
    144  * A real Allwinner H3 SoC contains a Boot ROM
    145  * which is the first code that runs right after
    146  * the SoC is powered on. The Boot ROM is responsible
    147  * for loading user code (e.g. a bootloader) from any
    148  * of the supported external devices and writing the
    149  * downloaded code to internal SRAM. After loading the SoC
    150  * begins executing the code written to SRAM.
    151  *
    152  * This function emulates the Boot ROM by copying 32 KiB
    153  * of data from the given block device and writes it to
    154  * the start of the first internal SRAM memory.
    155  *
    156  * @s: Allwinner H3 state object pointer
    157  * @blk: Block backend device object pointer
    158  */
    159 void allwinner_h3_bootrom_setup(AwH3State *s, BlockBackend *blk);
    160 
    161 #endif /* HW_ARM_ALLWINNER_H3_H */