smbios.c (47616B)
1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "smbios_build.h" 32 33 /* legacy structures and constants for <= 2.0 machines */ 34 struct smbios_header { 35 uint16_t length; 36 uint8_t type; 37 } QEMU_PACKED; 38 39 struct smbios_field { 40 struct smbios_header header; 41 uint8_t type; 42 uint16_t offset; 43 uint8_t data[]; 44 } QEMU_PACKED; 45 46 struct smbios_table { 47 struct smbios_header header; 48 uint8_t data[]; 49 } QEMU_PACKED; 50 51 #define SMBIOS_FIELD_ENTRY 0 52 #define SMBIOS_TABLE_ENTRY 1 53 54 static uint8_t *smbios_entries; 55 static size_t smbios_entries_len; 56 static bool smbios_legacy = true; 57 static bool smbios_uuid_encoded = true; 58 /* end: legacy structures & constants for <= 2.0 machines */ 59 60 61 uint8_t *smbios_tables; 62 size_t smbios_tables_len; 63 unsigned smbios_table_max; 64 unsigned smbios_table_cnt; 65 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 66 67 static SmbiosEntryPoint ep; 68 69 static int smbios_type4_count = 0; 70 static bool smbios_immutable; 71 static bool smbios_have_defaults; 72 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 73 74 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 75 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 76 77 static struct { 78 const char *vendor, *version, *date; 79 bool have_major_minor, uefi; 80 uint8_t major, minor; 81 } type0; 82 83 static struct { 84 const char *manufacturer, *product, *version, *serial, *sku, *family; 85 /* uuid is in qemu_uuid */ 86 } type1; 87 88 static struct { 89 const char *manufacturer, *product, *version, *serial, *asset, *location; 90 } type2; 91 92 static struct { 93 const char *manufacturer, *version, *serial, *asset, *sku; 94 } type3; 95 96 /* 97 * SVVP requires max_speed and current_speed to be set and not being 98 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 99 * default value to 2000MHz as we did before. 100 */ 101 #define DEFAULT_CPU_SPEED 2000 102 103 static struct { 104 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 105 uint64_t max_speed; 106 uint64_t current_speed; 107 uint64_t processor_id; 108 } type4 = { 109 .max_speed = DEFAULT_CPU_SPEED, 110 .current_speed = DEFAULT_CPU_SPEED, 111 .processor_id = 0, 112 }; 113 114 struct type8_instance { 115 const char *internal_reference, *external_reference; 116 uint8_t connector_type, port_type; 117 QTAILQ_ENTRY(type8_instance) next; 118 }; 119 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 120 121 static struct { 122 size_t nvalues; 123 char **values; 124 } type11; 125 126 static struct { 127 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 128 uint16_t speed; 129 } type17; 130 131 static QEnumLookup type41_kind_lookup = { 132 .array = (const char *const[]) { 133 "other", 134 "unknown", 135 "video", 136 "scsi", 137 "ethernet", 138 "tokenring", 139 "sound", 140 "pata", 141 "sata", 142 "sas", 143 }, 144 .size = 10 145 }; 146 struct type41_instance { 147 const char *designation, *pcidev; 148 uint8_t instance, kind; 149 QTAILQ_ENTRY(type41_instance) next; 150 }; 151 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 152 153 static QemuOptsList qemu_smbios_opts = { 154 .name = "smbios", 155 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 156 .desc = { 157 /* 158 * no elements => accept any params 159 * validation will happen later 160 */ 161 { /* end of list */ } 162 } 163 }; 164 165 static const QemuOptDesc qemu_smbios_file_opts[] = { 166 { 167 .name = "file", 168 .type = QEMU_OPT_STRING, 169 .help = "binary file containing an SMBIOS element", 170 }, 171 { /* end of list */ } 172 }; 173 174 static const QemuOptDesc qemu_smbios_type0_opts[] = { 175 { 176 .name = "type", 177 .type = QEMU_OPT_NUMBER, 178 .help = "SMBIOS element type", 179 },{ 180 .name = "vendor", 181 .type = QEMU_OPT_STRING, 182 .help = "vendor name", 183 },{ 184 .name = "version", 185 .type = QEMU_OPT_STRING, 186 .help = "version number", 187 },{ 188 .name = "date", 189 .type = QEMU_OPT_STRING, 190 .help = "release date", 191 },{ 192 .name = "release", 193 .type = QEMU_OPT_STRING, 194 .help = "revision number", 195 },{ 196 .name = "uefi", 197 .type = QEMU_OPT_BOOL, 198 .help = "uefi support", 199 }, 200 { /* end of list */ } 201 }; 202 203 static const QemuOptDesc qemu_smbios_type1_opts[] = { 204 { 205 .name = "type", 206 .type = QEMU_OPT_NUMBER, 207 .help = "SMBIOS element type", 208 },{ 209 .name = "manufacturer", 210 .type = QEMU_OPT_STRING, 211 .help = "manufacturer name", 212 },{ 213 .name = "product", 214 .type = QEMU_OPT_STRING, 215 .help = "product name", 216 },{ 217 .name = "version", 218 .type = QEMU_OPT_STRING, 219 .help = "version number", 220 },{ 221 .name = "serial", 222 .type = QEMU_OPT_STRING, 223 .help = "serial number", 224 },{ 225 .name = "uuid", 226 .type = QEMU_OPT_STRING, 227 .help = "UUID", 228 },{ 229 .name = "sku", 230 .type = QEMU_OPT_STRING, 231 .help = "SKU number", 232 },{ 233 .name = "family", 234 .type = QEMU_OPT_STRING, 235 .help = "family name", 236 }, 237 { /* end of list */ } 238 }; 239 240 static const QemuOptDesc qemu_smbios_type2_opts[] = { 241 { 242 .name = "type", 243 .type = QEMU_OPT_NUMBER, 244 .help = "SMBIOS element type", 245 },{ 246 .name = "manufacturer", 247 .type = QEMU_OPT_STRING, 248 .help = "manufacturer name", 249 },{ 250 .name = "product", 251 .type = QEMU_OPT_STRING, 252 .help = "product name", 253 },{ 254 .name = "version", 255 .type = QEMU_OPT_STRING, 256 .help = "version number", 257 },{ 258 .name = "serial", 259 .type = QEMU_OPT_STRING, 260 .help = "serial number", 261 },{ 262 .name = "asset", 263 .type = QEMU_OPT_STRING, 264 .help = "asset tag number", 265 },{ 266 .name = "location", 267 .type = QEMU_OPT_STRING, 268 .help = "location in chassis", 269 }, 270 { /* end of list */ } 271 }; 272 273 static const QemuOptDesc qemu_smbios_type3_opts[] = { 274 { 275 .name = "type", 276 .type = QEMU_OPT_NUMBER, 277 .help = "SMBIOS element type", 278 },{ 279 .name = "manufacturer", 280 .type = QEMU_OPT_STRING, 281 .help = "manufacturer name", 282 },{ 283 .name = "version", 284 .type = QEMU_OPT_STRING, 285 .help = "version number", 286 },{ 287 .name = "serial", 288 .type = QEMU_OPT_STRING, 289 .help = "serial number", 290 },{ 291 .name = "asset", 292 .type = QEMU_OPT_STRING, 293 .help = "asset tag number", 294 },{ 295 .name = "sku", 296 .type = QEMU_OPT_STRING, 297 .help = "SKU number", 298 }, 299 { /* end of list */ } 300 }; 301 302 static const QemuOptDesc qemu_smbios_type4_opts[] = { 303 { 304 .name = "type", 305 .type = QEMU_OPT_NUMBER, 306 .help = "SMBIOS element type", 307 },{ 308 .name = "sock_pfx", 309 .type = QEMU_OPT_STRING, 310 .help = "socket designation string prefix", 311 },{ 312 .name = "manufacturer", 313 .type = QEMU_OPT_STRING, 314 .help = "manufacturer name", 315 },{ 316 .name = "version", 317 .type = QEMU_OPT_STRING, 318 .help = "version number", 319 },{ 320 .name = "max-speed", 321 .type = QEMU_OPT_NUMBER, 322 .help = "max speed in MHz", 323 },{ 324 .name = "current-speed", 325 .type = QEMU_OPT_NUMBER, 326 .help = "speed at system boot in MHz", 327 },{ 328 .name = "serial", 329 .type = QEMU_OPT_STRING, 330 .help = "serial number", 331 },{ 332 .name = "asset", 333 .type = QEMU_OPT_STRING, 334 .help = "asset tag number", 335 },{ 336 .name = "part", 337 .type = QEMU_OPT_STRING, 338 .help = "part number", 339 }, { 340 .name = "processor-id", 341 .type = QEMU_OPT_NUMBER, 342 .help = "processor id", 343 }, 344 { /* end of list */ } 345 }; 346 347 static const QemuOptDesc qemu_smbios_type8_opts[] = { 348 { 349 .name = "internal_reference", 350 .type = QEMU_OPT_STRING, 351 .help = "internal reference designator", 352 }, 353 { 354 .name = "external_reference", 355 .type = QEMU_OPT_STRING, 356 .help = "external reference designator", 357 }, 358 { 359 .name = "connector_type", 360 .type = QEMU_OPT_NUMBER, 361 .help = "connector type", 362 }, 363 { 364 .name = "port_type", 365 .type = QEMU_OPT_NUMBER, 366 .help = "port type", 367 }, 368 }; 369 370 static const QemuOptDesc qemu_smbios_type11_opts[] = { 371 { 372 .name = "value", 373 .type = QEMU_OPT_STRING, 374 .help = "OEM string data", 375 }, 376 { 377 .name = "path", 378 .type = QEMU_OPT_STRING, 379 .help = "OEM string data from file", 380 }, 381 }; 382 383 static const QemuOptDesc qemu_smbios_type17_opts[] = { 384 { 385 .name = "type", 386 .type = QEMU_OPT_NUMBER, 387 .help = "SMBIOS element type", 388 },{ 389 .name = "loc_pfx", 390 .type = QEMU_OPT_STRING, 391 .help = "device locator string prefix", 392 },{ 393 .name = "bank", 394 .type = QEMU_OPT_STRING, 395 .help = "bank locator string", 396 },{ 397 .name = "manufacturer", 398 .type = QEMU_OPT_STRING, 399 .help = "manufacturer name", 400 },{ 401 .name = "serial", 402 .type = QEMU_OPT_STRING, 403 .help = "serial number", 404 },{ 405 .name = "asset", 406 .type = QEMU_OPT_STRING, 407 .help = "asset tag number", 408 },{ 409 .name = "part", 410 .type = QEMU_OPT_STRING, 411 .help = "part number", 412 },{ 413 .name = "speed", 414 .type = QEMU_OPT_NUMBER, 415 .help = "maximum capable speed", 416 }, 417 { /* end of list */ } 418 }; 419 420 static const QemuOptDesc qemu_smbios_type41_opts[] = { 421 { 422 .name = "type", 423 .type = QEMU_OPT_NUMBER, 424 .help = "SMBIOS element type", 425 },{ 426 .name = "designation", 427 .type = QEMU_OPT_STRING, 428 .help = "reference designation string", 429 },{ 430 .name = "kind", 431 .type = QEMU_OPT_STRING, 432 .help = "device type", 433 .def_value_str = "other", 434 },{ 435 .name = "instance", 436 .type = QEMU_OPT_NUMBER, 437 .help = "device type instance", 438 },{ 439 .name = "pcidev", 440 .type = QEMU_OPT_STRING, 441 .help = "PCI device", 442 }, 443 { /* end of list */ } 444 }; 445 446 static void smbios_register_config(void) 447 { 448 qemu_add_opts(&qemu_smbios_opts); 449 } 450 451 opts_init(smbios_register_config); 452 453 /* 454 * The SMBIOS 2.1 "structure table length" field in the 455 * entry point uses a 16-bit integer, so we're limited 456 * in total table size 457 */ 458 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 459 460 static void smbios_validate_table(MachineState *ms) 461 { 462 uint32_t expect_t4_count = smbios_legacy ? 463 ms->smp.cpus : smbios_smp_sockets; 464 465 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 466 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 467 expect_t4_count, smbios_type4_count); 468 exit(1); 469 } 470 471 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 472 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 473 error_report("SMBIOS 2.1 table length %zu exceeds %d", 474 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 475 exit(1); 476 } 477 } 478 479 480 /* legacy setup functions for <= 2.0 machines */ 481 static void smbios_add_field(int type, int offset, const void *data, size_t len) 482 { 483 struct smbios_field *field; 484 485 if (!smbios_entries) { 486 smbios_entries_len = sizeof(uint16_t); 487 smbios_entries = g_malloc0(smbios_entries_len); 488 } 489 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 490 sizeof(*field) + len); 491 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 492 field->header.type = SMBIOS_FIELD_ENTRY; 493 field->header.length = cpu_to_le16(sizeof(*field) + len); 494 495 field->type = type; 496 field->offset = cpu_to_le16(offset); 497 memcpy(field->data, data, len); 498 499 smbios_entries_len += sizeof(*field) + len; 500 (*(uint16_t *)smbios_entries) = 501 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 502 } 503 504 static void smbios_maybe_add_str(int type, int offset, const char *data) 505 { 506 if (data) { 507 smbios_add_field(type, offset, data, strlen(data) + 1); 508 } 509 } 510 511 static void smbios_build_type_0_fields(void) 512 { 513 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 514 type0.vendor); 515 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 516 type0.version); 517 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 518 bios_release_date_str), 519 type0.date); 520 if (type0.have_major_minor) { 521 smbios_add_field(0, offsetof(struct smbios_type_0, 522 system_bios_major_release), 523 &type0.major, 1); 524 smbios_add_field(0, offsetof(struct smbios_type_0, 525 system_bios_minor_release), 526 &type0.minor, 1); 527 } 528 } 529 530 static void smbios_build_type_1_fields(void) 531 { 532 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 533 type1.manufacturer); 534 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 535 type1.product); 536 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 537 type1.version); 538 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 539 type1.serial); 540 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 541 type1.sku); 542 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 543 type1.family); 544 if (qemu_uuid_set) { 545 /* We don't encode the UUID in the "wire format" here because this 546 * function is for legacy mode and needs to keep the guest ABI, and 547 * because we don't know what's the SMBIOS version advertised by the 548 * BIOS. 549 */ 550 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 551 &qemu_uuid, 16); 552 } 553 } 554 555 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 556 { 557 if (!smbios_legacy) { 558 *length = 0; 559 return NULL; 560 } 561 562 if (!smbios_immutable) { 563 smbios_build_type_0_fields(); 564 smbios_build_type_1_fields(); 565 smbios_validate_table(ms); 566 smbios_immutable = true; 567 } 568 *length = smbios_entries_len; 569 return smbios_entries; 570 } 571 /* end: legacy setup functions for <= 2.0 machines */ 572 573 574 bool smbios_skip_table(uint8_t type, bool required_table) 575 { 576 if (test_bit(type, have_binfile_bitmap)) { 577 return true; /* user provided their own binary blob(s) */ 578 } 579 if (test_bit(type, have_fields_bitmap)) { 580 return false; /* user provided fields via command line */ 581 } 582 if (smbios_have_defaults && required_table) { 583 return false; /* we're building tables, and this one's required */ 584 } 585 return true; 586 } 587 588 #define T0_BASE 0x000 589 #define T1_BASE 0x100 590 #define T2_BASE 0x200 591 #define T3_BASE 0x300 592 #define T4_BASE 0x400 593 #define T11_BASE 0xe00 594 595 #define T16_BASE 0x1000 596 #define T17_BASE 0x1100 597 #define T19_BASE 0x1300 598 #define T32_BASE 0x2000 599 #define T41_BASE 0x2900 600 #define T127_BASE 0x7F00 601 602 static void smbios_build_type_0_table(void) 603 { 604 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 605 606 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 607 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 608 609 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 610 611 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 612 613 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 614 615 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 616 t->bios_characteristics_extension_bytes[0] = 0; 617 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 618 if (type0.uefi) { 619 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 620 } 621 622 if (type0.have_major_minor) { 623 t->system_bios_major_release = type0.major; 624 t->system_bios_minor_release = type0.minor; 625 } else { 626 t->system_bios_major_release = 0; 627 t->system_bios_minor_release = 0; 628 } 629 630 /* hardcoded in SeaBIOS */ 631 t->embedded_controller_major_release = 0xFF; 632 t->embedded_controller_minor_release = 0xFF; 633 634 SMBIOS_BUILD_TABLE_POST; 635 } 636 637 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 638 * format specified by SMBIOS version 2.6. 639 */ 640 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 641 { 642 memcpy(uuid, in, 16); 643 if (smbios_uuid_encoded) { 644 uuid->time_low = bswap32(uuid->time_low); 645 uuid->time_mid = bswap16(uuid->time_mid); 646 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 647 } 648 } 649 650 static void smbios_build_type_1_table(void) 651 { 652 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 653 654 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 655 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 656 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 657 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 658 if (qemu_uuid_set) { 659 smbios_encode_uuid(&t->uuid, &qemu_uuid); 660 } else { 661 memset(&t->uuid, 0, 16); 662 } 663 t->wake_up_type = 0x06; /* power switch */ 664 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 665 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 666 667 SMBIOS_BUILD_TABLE_POST; 668 } 669 670 static void smbios_build_type_2_table(void) 671 { 672 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 673 674 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 675 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 676 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 677 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 678 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 679 t->feature_flags = 0x01; /* Motherboard */ 680 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 681 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 682 t->board_type = 0x0A; /* Motherboard */ 683 t->contained_element_count = 0; 684 685 SMBIOS_BUILD_TABLE_POST; 686 } 687 688 static void smbios_build_type_3_table(void) 689 { 690 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 691 692 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 693 t->type = 0x01; /* Other */ 694 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 695 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 696 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 697 t->boot_up_state = 0x03; /* Safe */ 698 t->power_supply_state = 0x03; /* Safe */ 699 t->thermal_state = 0x03; /* Safe */ 700 t->security_status = 0x02; /* Unknown */ 701 t->oem_defined = cpu_to_le32(0); 702 t->height = 0; 703 t->number_of_power_cords = 0; 704 t->contained_element_count = 0; 705 t->contained_element_record_length = 0; 706 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 707 708 SMBIOS_BUILD_TABLE_POST; 709 } 710 711 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 712 { 713 char sock_str[128]; 714 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 715 716 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 717 tbl_len = SMBIOS_TYPE_4_LEN_V30; 718 } 719 720 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 721 true, tbl_len); /* required */ 722 723 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 724 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 725 t->processor_type = 0x03; /* CPU */ 726 t->processor_family = 0x01; /* Other */ 727 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 728 if (type4.processor_id == 0) { 729 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 730 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 731 } else { 732 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 733 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 734 } 735 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 736 t->voltage = 0; 737 t->external_clock = cpu_to_le16(0); /* Unknown */ 738 t->max_speed = cpu_to_le16(type4.max_speed); 739 t->current_speed = cpu_to_le16(type4.current_speed); 740 t->status = 0x41; /* Socket populated, CPU enabled */ 741 t->processor_upgrade = 0x01; /* Other */ 742 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 743 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 744 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 745 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 746 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 747 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 748 749 t->core_count = (ms->smp.cores > 255) ? 0xFF : ms->smp.cores; 750 t->core_enabled = t->core_count; 751 752 t->core_count2 = t->core_enabled2 = cpu_to_le16(ms->smp.cores); 753 754 t->thread_count = (ms->smp.threads > 255) ? 0xFF : ms->smp.threads; 755 t->thread_count2 = cpu_to_le16(ms->smp.threads); 756 757 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 758 t->processor_family2 = cpu_to_le16(0x01); /* Other */ 759 760 SMBIOS_BUILD_TABLE_POST; 761 smbios_type4_count++; 762 } 763 764 static void smbios_build_type_8_table(void) 765 { 766 unsigned instance = 0; 767 struct type8_instance *t8; 768 769 QTAILQ_FOREACH(t8, &type8, next) { 770 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 771 772 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 773 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 774 /* most vendors seem to set this to None */ 775 t->internal_connector_type = 0x0; 776 t->external_connector_type = t8->connector_type; 777 t->port_type = t8->port_type; 778 779 SMBIOS_BUILD_TABLE_POST; 780 instance++; 781 } 782 } 783 784 static void smbios_build_type_11_table(void) 785 { 786 char count_str[128]; 787 size_t i; 788 789 if (type11.nvalues == 0) { 790 return; 791 } 792 793 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 794 795 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 796 t->count = type11.nvalues; 797 798 for (i = 0; i < type11.nvalues; i++) { 799 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 800 g_free(type11.values[i]); 801 type11.values[i] = NULL; 802 } 803 804 SMBIOS_BUILD_TABLE_POST; 805 } 806 807 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 808 809 static void smbios_build_type_16_table(unsigned dimm_cnt) 810 { 811 uint64_t size_kb; 812 813 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 814 815 t->location = 0x01; /* Other */ 816 t->use = 0x03; /* System memory */ 817 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 818 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 819 if (size_kb < MAX_T16_STD_SZ) { 820 t->maximum_capacity = cpu_to_le32(size_kb); 821 t->extended_maximum_capacity = cpu_to_le64(0); 822 } else { 823 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 824 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 825 } 826 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 827 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 828 829 SMBIOS_BUILD_TABLE_POST; 830 } 831 832 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 833 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 834 835 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 836 { 837 char loc_str[128]; 838 uint64_t size_mb; 839 840 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 841 842 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 843 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 844 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 845 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 846 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 847 if (size_mb < MAX_T17_STD_SZ) { 848 t->size = cpu_to_le16(size_mb); 849 t->extended_size = cpu_to_le32(0); 850 } else { 851 assert(size_mb < MAX_T17_EXT_SZ); 852 t->size = cpu_to_le16(MAX_T17_STD_SZ); 853 t->extended_size = cpu_to_le32(size_mb); 854 } 855 t->form_factor = 0x09; /* DIMM */ 856 t->device_set = 0; /* Not in a set */ 857 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 858 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 859 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 860 t->memory_type = 0x07; /* RAM */ 861 t->type_detail = cpu_to_le16(0x02); /* Other */ 862 t->speed = cpu_to_le16(type17.speed); 863 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 864 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 865 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 866 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 867 t->attributes = 0; /* Unknown */ 868 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 869 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 870 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 871 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 872 873 SMBIOS_BUILD_TABLE_POST; 874 } 875 876 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 877 uint64_t start, uint64_t size) 878 { 879 uint64_t end, start_kb, end_kb; 880 881 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 882 true); /* required */ 883 884 end = start + size - 1; 885 assert(end > start); 886 start_kb = start / KiB; 887 end_kb = end / KiB; 888 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 889 t->starting_address = cpu_to_le32(start_kb); 890 t->ending_address = cpu_to_le32(end_kb); 891 t->extended_starting_address = 892 t->extended_ending_address = cpu_to_le64(0); 893 } else { 894 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 895 t->extended_starting_address = cpu_to_le64(start); 896 t->extended_ending_address = cpu_to_le64(end); 897 } 898 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 899 t->partition_width = 1; /* One device per row */ 900 901 SMBIOS_BUILD_TABLE_POST; 902 } 903 904 static void smbios_build_type_32_table(void) 905 { 906 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 907 908 memset(t->reserved, 0, 6); 909 t->boot_status = 0; /* No errors detected */ 910 911 SMBIOS_BUILD_TABLE_POST; 912 } 913 914 static void smbios_build_type_41_table(Error **errp) 915 { 916 unsigned instance = 0; 917 struct type41_instance *t41; 918 919 QTAILQ_FOREACH(t41, &type41, next) { 920 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 921 922 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 923 t->device_type = t41->kind; 924 t->device_type_instance = t41->instance; 925 t->segment_group_number = cpu_to_le16(0); 926 t->bus_number = 0; 927 t->device_number = 0; 928 929 if (t41->pcidev) { 930 PCIDevice *pdev = NULL; 931 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 932 if (rc != 0) { 933 error_setg(errp, 934 "No PCI device %s for SMBIOS type 41 entry %s", 935 t41->pcidev, t41->designation); 936 return; 937 } 938 /* 939 * We only handle the case were the device is attached to 940 * the PCI root bus. The general case is more complex as 941 * bridges are enumerated later and the table would need 942 * to be updated at this moment. 943 */ 944 if (!pci_bus_is_root(pci_get_bus(pdev))) { 945 error_setg(errp, 946 "Cannot create type 41 entry for PCI device %s: " 947 "not attached to the root bus", 948 t41->pcidev); 949 return; 950 } 951 t->segment_group_number = cpu_to_le16(0); 952 t->bus_number = pci_dev_bus_num(pdev); 953 t->device_number = pdev->devfn; 954 } 955 956 SMBIOS_BUILD_TABLE_POST; 957 instance++; 958 } 959 } 960 961 static void smbios_build_type_127_table(void) 962 { 963 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 964 SMBIOS_BUILD_TABLE_POST; 965 } 966 967 void smbios_set_cpuid(uint32_t version, uint32_t features) 968 { 969 smbios_cpuid_version = version; 970 smbios_cpuid_features = features; 971 } 972 973 #define SMBIOS_SET_DEFAULT(field, value) \ 974 if (!field) { \ 975 field = value; \ 976 } 977 978 void smbios_set_defaults(const char *manufacturer, const char *product, 979 const char *version, bool legacy_mode, 980 bool uuid_encoded, SmbiosEntryPointType ep_type) 981 { 982 smbios_have_defaults = true; 983 smbios_legacy = legacy_mode; 984 smbios_uuid_encoded = uuid_encoded; 985 smbios_ep_type = ep_type; 986 987 /* drop unwanted version of command-line file blob(s) */ 988 if (smbios_legacy) { 989 g_free(smbios_tables); 990 /* in legacy mode, also complain if fields were given for types > 1 */ 991 if (find_next_bit(have_fields_bitmap, 992 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 993 error_report("can't process fields for smbios " 994 "types > 1 on machine versions < 2.1!"); 995 exit(1); 996 } 997 } else { 998 g_free(smbios_entries); 999 } 1000 1001 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1002 SMBIOS_SET_DEFAULT(type1.product, product); 1003 SMBIOS_SET_DEFAULT(type1.version, version); 1004 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1005 SMBIOS_SET_DEFAULT(type2.product, product); 1006 SMBIOS_SET_DEFAULT(type2.version, version); 1007 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1008 SMBIOS_SET_DEFAULT(type3.version, version); 1009 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1010 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1011 SMBIOS_SET_DEFAULT(type4.version, version); 1012 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1013 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1014 } 1015 1016 static void smbios_entry_point_setup(void) 1017 { 1018 switch (smbios_ep_type) { 1019 case SMBIOS_ENTRY_POINT_TYPE_32: 1020 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1021 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1022 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1023 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1024 memset(ep.ep21.formatted_area, 0, 5); 1025 1026 /* compliant with smbios spec v2.8 */ 1027 ep.ep21.smbios_major_version = 2; 1028 ep.ep21.smbios_minor_version = 8; 1029 ep.ep21.smbios_bcd_revision = 0x28; 1030 1031 /* set during table construction, but BIOS may override: */ 1032 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1033 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1034 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1035 1036 /* BIOS must recalculate */ 1037 ep.ep21.checksum = 0; 1038 ep.ep21.intermediate_checksum = 0; 1039 ep.ep21.structure_table_address = cpu_to_le32(0); 1040 1041 break; 1042 case SMBIOS_ENTRY_POINT_TYPE_64: 1043 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1044 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1045 ep.ep30.entry_point_revision = 1; 1046 ep.ep30.reserved = 0; 1047 1048 /* compliant with smbios spec 3.0 */ 1049 ep.ep30.smbios_major_version = 3; 1050 ep.ep30.smbios_minor_version = 0; 1051 ep.ep30.smbios_doc_rev = 0; 1052 1053 /* set during table construct, but BIOS might override */ 1054 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1055 1056 /* BIOS must recalculate */ 1057 ep.ep30.checksum = 0; 1058 ep.ep30.structure_table_address = cpu_to_le64(0); 1059 1060 break; 1061 default: 1062 abort(); 1063 break; 1064 } 1065 } 1066 1067 void smbios_get_tables(MachineState *ms, 1068 const struct smbios_phys_mem_area *mem_array, 1069 const unsigned int mem_array_size, 1070 uint8_t **tables, size_t *tables_len, 1071 uint8_t **anchor, size_t *anchor_len, 1072 Error **errp) 1073 { 1074 unsigned i, dimm_cnt, offset; 1075 1076 if (smbios_legacy) { 1077 *tables = *anchor = NULL; 1078 *tables_len = *anchor_len = 0; 1079 return; 1080 } 1081 1082 if (!smbios_immutable) { 1083 smbios_build_type_0_table(); 1084 smbios_build_type_1_table(); 1085 smbios_build_type_2_table(); 1086 smbios_build_type_3_table(); 1087 1088 smbios_smp_sockets = DIV_ROUND_UP(ms->smp.cpus, 1089 ms->smp.cores * ms->smp.threads); 1090 assert(smbios_smp_sockets >= 1); 1091 1092 for (i = 0; i < smbios_smp_sockets; i++) { 1093 smbios_build_type_4_table(ms, i); 1094 } 1095 1096 smbios_build_type_8_table(); 1097 smbios_build_type_11_table(); 1098 1099 #define MAX_DIMM_SZ (16 * GiB) 1100 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1101 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1102 1103 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1104 1105 /* 1106 * The offset determines if we need to keep additional space betweeen 1107 * table 17 and table 19 header handle numbers so that they do 1108 * not overlap. For example, for a VM with larger than 8 TB guest 1109 * memory and DIMM like chunks of 16 GiB, the default space between 1110 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1111 */ 1112 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1113 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1114 1115 smbios_build_type_16_table(dimm_cnt); 1116 1117 for (i = 0; i < dimm_cnt; i++) { 1118 smbios_build_type_17_table(i, GET_DIMM_SZ); 1119 } 1120 1121 for (i = 0; i < mem_array_size; i++) { 1122 smbios_build_type_19_table(i, offset, mem_array[i].address, 1123 mem_array[i].length); 1124 } 1125 1126 /* 1127 * make sure 16 bit handle numbers in the headers of tables 19 1128 * and 32 do not overlap. 1129 */ 1130 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1131 1132 smbios_build_type_32_table(); 1133 smbios_build_type_38_table(); 1134 smbios_build_type_41_table(errp); 1135 smbios_build_type_127_table(); 1136 1137 smbios_validate_table(ms); 1138 smbios_entry_point_setup(); 1139 smbios_immutable = true; 1140 } 1141 1142 /* return tables blob and entry point (anchor), and their sizes */ 1143 *tables = smbios_tables; 1144 *tables_len = smbios_tables_len; 1145 *anchor = (uint8_t *)&ep; 1146 1147 /* calculate length based on anchor string */ 1148 if (!strncmp((char *)&ep, "_SM_", 4)) { 1149 *anchor_len = sizeof(struct smbios_21_entry_point); 1150 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1151 *anchor_len = sizeof(struct smbios_30_entry_point); 1152 } else { 1153 abort(); 1154 } 1155 } 1156 1157 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1158 { 1159 const char *val = qemu_opt_get(opts, name); 1160 1161 if (val) { 1162 *dest = val; 1163 } 1164 } 1165 1166 1167 struct opt_list { 1168 size_t *ndest; 1169 char ***dest; 1170 }; 1171 1172 static int save_opt_one(void *opaque, 1173 const char *name, const char *value, 1174 Error **errp) 1175 { 1176 struct opt_list *opt = opaque; 1177 1178 if (g_str_equal(name, "path")) { 1179 g_autoptr(GByteArray) data = g_byte_array_new(); 1180 g_autofree char *buf = g_new(char, 4096); 1181 ssize_t ret; 1182 int fd = qemu_open(value, O_RDONLY, errp); 1183 if (fd < 0) { 1184 return -1; 1185 } 1186 1187 while (1) { 1188 ret = read(fd, buf, 4096); 1189 if (ret == 0) { 1190 break; 1191 } 1192 if (ret < 0) { 1193 error_setg(errp, "Unable to read from %s: %s", 1194 value, strerror(errno)); 1195 qemu_close(fd); 1196 return -1; 1197 } 1198 if (memchr(buf, '\0', ret)) { 1199 error_setg(errp, "NUL in OEM strings value in %s", value); 1200 qemu_close(fd); 1201 return -1; 1202 } 1203 g_byte_array_append(data, (guint8 *)buf, ret); 1204 } 1205 1206 qemu_close(fd); 1207 1208 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1209 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1210 (*opt->ndest)++; 1211 data = NULL; 1212 } else if (g_str_equal(name, "value")) { 1213 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1214 (*opt->dest)[*opt->ndest] = g_strdup(value); 1215 (*opt->ndest)++; 1216 } else if (!g_str_equal(name, "type")) { 1217 error_setg(errp, "Unexpected option %s", name); 1218 return -1; 1219 } 1220 1221 return 0; 1222 } 1223 1224 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1225 Error **errp) 1226 { 1227 struct opt_list opt = { 1228 ndest, dest, 1229 }; 1230 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1231 return false; 1232 } 1233 return true; 1234 } 1235 1236 void smbios_entry_add(QemuOpts *opts, Error **errp) 1237 { 1238 const char *val; 1239 1240 assert(!smbios_immutable); 1241 1242 val = qemu_opt_get(opts, "file"); 1243 if (val) { 1244 struct smbios_structure_header *header; 1245 int size; 1246 struct smbios_table *table; /* legacy mode only */ 1247 1248 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1249 return; 1250 } 1251 1252 size = get_image_size(val); 1253 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1254 error_setg(errp, "Cannot read SMBIOS file %s", val); 1255 return; 1256 } 1257 1258 /* 1259 * NOTE: standard double '\0' terminator expected, per smbios spec. 1260 * (except in legacy mode, where the second '\0' is implicit and 1261 * will be inserted by the BIOS). 1262 */ 1263 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1264 header = (struct smbios_structure_header *)(smbios_tables + 1265 smbios_tables_len); 1266 1267 if (load_image_size(val, (uint8_t *)header, size) != size) { 1268 error_setg(errp, "Failed to load SMBIOS file %s", val); 1269 return; 1270 } 1271 1272 if (header->type <= SMBIOS_MAX_TYPE) { 1273 if (test_bit(header->type, have_fields_bitmap)) { 1274 error_setg(errp, 1275 "can't load type %d struct, fields already specified!", 1276 header->type); 1277 return; 1278 } 1279 set_bit(header->type, have_binfile_bitmap); 1280 } 1281 1282 if (header->type == 4) { 1283 smbios_type4_count++; 1284 } 1285 1286 smbios_tables_len += size; 1287 if (size > smbios_table_max) { 1288 smbios_table_max = size; 1289 } 1290 smbios_table_cnt++; 1291 1292 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1293 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1294 * yet know which mode (legacy vs. aggregate-table) will be 1295 * required. We therefore add the binary blob to both legacy 1296 * (smbios_entries) and aggregate (smbios_tables) tables, and 1297 * delete the one we don't need from smbios_set_defaults(), 1298 * once we know which machine version has been requested. 1299 */ 1300 if (!smbios_entries) { 1301 smbios_entries_len = sizeof(uint16_t); 1302 smbios_entries = g_malloc0(smbios_entries_len); 1303 } 1304 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1305 size + sizeof(*table)); 1306 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1307 table->header.type = SMBIOS_TABLE_ENTRY; 1308 table->header.length = cpu_to_le16(sizeof(*table) + size); 1309 memcpy(table->data, header, size); 1310 smbios_entries_len += sizeof(*table) + size; 1311 (*(uint16_t *)smbios_entries) = 1312 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1313 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1314 1315 return; 1316 } 1317 1318 val = qemu_opt_get(opts, "type"); 1319 if (val) { 1320 unsigned long type = strtoul(val, NULL, 0); 1321 1322 if (type > SMBIOS_MAX_TYPE) { 1323 error_setg(errp, "out of range!"); 1324 return; 1325 } 1326 1327 if (test_bit(type, have_binfile_bitmap)) { 1328 error_setg(errp, "can't add fields, binary file already loaded!"); 1329 return; 1330 } 1331 set_bit(type, have_fields_bitmap); 1332 1333 switch (type) { 1334 case 0: 1335 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1336 return; 1337 } 1338 save_opt(&type0.vendor, opts, "vendor"); 1339 save_opt(&type0.version, opts, "version"); 1340 save_opt(&type0.date, opts, "date"); 1341 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1342 1343 val = qemu_opt_get(opts, "release"); 1344 if (val) { 1345 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1346 error_setg(errp, "Invalid release"); 1347 return; 1348 } 1349 type0.have_major_minor = true; 1350 } 1351 return; 1352 case 1: 1353 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1354 return; 1355 } 1356 save_opt(&type1.manufacturer, opts, "manufacturer"); 1357 save_opt(&type1.product, opts, "product"); 1358 save_opt(&type1.version, opts, "version"); 1359 save_opt(&type1.serial, opts, "serial"); 1360 save_opt(&type1.sku, opts, "sku"); 1361 save_opt(&type1.family, opts, "family"); 1362 1363 val = qemu_opt_get(opts, "uuid"); 1364 if (val) { 1365 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1366 error_setg(errp, "Invalid UUID"); 1367 return; 1368 } 1369 qemu_uuid_set = true; 1370 } 1371 return; 1372 case 2: 1373 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1374 return; 1375 } 1376 save_opt(&type2.manufacturer, opts, "manufacturer"); 1377 save_opt(&type2.product, opts, "product"); 1378 save_opt(&type2.version, opts, "version"); 1379 save_opt(&type2.serial, opts, "serial"); 1380 save_opt(&type2.asset, opts, "asset"); 1381 save_opt(&type2.location, opts, "location"); 1382 return; 1383 case 3: 1384 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1385 return; 1386 } 1387 save_opt(&type3.manufacturer, opts, "manufacturer"); 1388 save_opt(&type3.version, opts, "version"); 1389 save_opt(&type3.serial, opts, "serial"); 1390 save_opt(&type3.asset, opts, "asset"); 1391 save_opt(&type3.sku, opts, "sku"); 1392 return; 1393 case 4: 1394 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1395 return; 1396 } 1397 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1398 save_opt(&type4.manufacturer, opts, "manufacturer"); 1399 save_opt(&type4.version, opts, "version"); 1400 save_opt(&type4.serial, opts, "serial"); 1401 save_opt(&type4.asset, opts, "asset"); 1402 save_opt(&type4.part, opts, "part"); 1403 /* If the value is 0, it will take the value from the CPU model. */ 1404 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1405 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1406 DEFAULT_CPU_SPEED); 1407 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1408 DEFAULT_CPU_SPEED); 1409 if (type4.max_speed > UINT16_MAX || 1410 type4.current_speed > UINT16_MAX) { 1411 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1412 UINT16_MAX); 1413 } 1414 return; 1415 case 8: 1416 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1417 return; 1418 } 1419 struct type8_instance *t; 1420 t = g_new0(struct type8_instance, 1); 1421 save_opt(&t->internal_reference, opts, "internal_reference"); 1422 save_opt(&t->external_reference, opts, "external_reference"); 1423 t->connector_type = qemu_opt_get_number(opts, "connector_type", 0); 1424 t->port_type = qemu_opt_get_number(opts, "port_type", 0); 1425 QTAILQ_INSERT_TAIL(&type8, t, next); 1426 return; 1427 case 11: 1428 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1429 return; 1430 } 1431 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1432 return; 1433 } 1434 return; 1435 case 17: 1436 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1437 return; 1438 } 1439 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1440 save_opt(&type17.bank, opts, "bank"); 1441 save_opt(&type17.manufacturer, opts, "manufacturer"); 1442 save_opt(&type17.serial, opts, "serial"); 1443 save_opt(&type17.asset, opts, "asset"); 1444 save_opt(&type17.part, opts, "part"); 1445 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1446 return; 1447 case 41: { 1448 struct type41_instance *t; 1449 Error *local_err = NULL; 1450 1451 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1452 return; 1453 } 1454 t = g_new0(struct type41_instance, 1); 1455 save_opt(&t->designation, opts, "designation"); 1456 t->kind = qapi_enum_parse(&type41_kind_lookup, 1457 qemu_opt_get(opts, "kind"), 1458 0, &local_err) + 1; 1459 t->kind |= 0x80; /* enabled */ 1460 if (local_err != NULL) { 1461 error_propagate(errp, local_err); 1462 g_free(t); 1463 return; 1464 } 1465 t->instance = qemu_opt_get_number(opts, "instance", 1); 1466 save_opt(&t->pcidev, opts, "pcidev"); 1467 1468 QTAILQ_INSERT_TAIL(&type41, t, next); 1469 return; 1470 } 1471 default: 1472 error_setg(errp, 1473 "Don't know how to build fields for SMBIOS type %ld", 1474 type); 1475 return; 1476 } 1477 } 1478 1479 error_setg(errp, "Must specify type= or file="); 1480 }