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mpc8544_guts.c (4323B)

      1 /*
      2  * QEMU PowerPC MPC8544 global util pseudo-device
      3  *
      4  * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
      5  *
      6  * Author: Alexander Graf, <alex@csgraf.de>
      7  *
      8  * This is free software; you can redistribute it and/or modify
      9  * it under the terms of  the GNU General  Public License as published by
     10  * the Free Software Foundation;  either version 2 of the  License, or
     11  * (at your option) any later version.
     12  *
     13  * *****************************************************************
     14  *
     15  * The documentation for this device is noted in the MPC8544 documentation,
     16  * file name "MPC8544ERM.pdf". You can easily find it on the web.
     17  *
     18  */
     19 
     20 #include "qemu/osdep.h"
     21 #include "qemu/module.h"
     22 #include "qemu/log.h"
     23 #include "sysemu/runstate.h"
     24 #include "cpu.h"
     25 #include "hw/sysbus.h"
     26 #include "qom/object.h"
     27 
     28 #define MPC8544_GUTS_MMIO_SIZE        0x1000
     29 #define MPC8544_GUTS_RSTCR_RESET      0x02
     30 
     31 #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
     32 #define MPC8544_GUTS_ADDR_PORBMSR     0x04
     33 #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
     34 #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
     35 #define MPC8544_GUTS_ADDR_PORDBGMSR   0x10
     36 #define MPC8544_GUTS_ADDR_PORDEVSR2   0x14
     37 #define MPC8544_GUTS_ADDR_GPPORCR     0x20
     38 #define MPC8544_GUTS_ADDR_GPIOCR      0x30
     39 #define MPC8544_GUTS_ADDR_GPOUTDR     0x40
     40 #define MPC8544_GUTS_ADDR_GPINDR      0x50
     41 #define MPC8544_GUTS_ADDR_PMUXCR      0x60
     42 #define MPC8544_GUTS_ADDR_DEVDISR     0x70
     43 #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
     44 #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
     45 #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
     46 #define MPC8544_GUTS_ADDR_PVR         0xA0
     47 #define MPC8544_GUTS_ADDR_SVR         0xA4
     48 #define MPC8544_GUTS_ADDR_RSTCR       0xB0
     49 #define MPC8544_GUTS_ADDR_IOVSELSR    0xC0
     50 #define MPC8544_GUTS_ADDR_DDRCSR      0xB20
     51 #define MPC8544_GUTS_ADDR_DDRCDR      0xB24
     52 #define MPC8544_GUTS_ADDR_DDRCLKDR    0xB28
     53 #define MPC8544_GUTS_ADDR_CLKOCR      0xE00
     54 #define MPC8544_GUTS_ADDR_SRDS1CR1    0xF04
     55 #define MPC8544_GUTS_ADDR_SRDS2CR1    0xF10
     56 #define MPC8544_GUTS_ADDR_SRDS2CR3    0xF18
     57 
     58 #define TYPE_MPC8544_GUTS "mpc8544-guts"
     59 OBJECT_DECLARE_SIMPLE_TYPE(GutsState, MPC8544_GUTS)
     60 
     61 struct GutsState {
     62     /*< private >*/
     63     SysBusDevice parent_obj;
     64     /*< public >*/
     65 
     66     MemoryRegion iomem;
     67 };
     68 
     69 
     70 static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
     71                                   unsigned size)
     72 {
     73     uint32_t value = 0;
     74     PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
     75     CPUPPCState *env = &cpu->env;
     76 
     77     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
     78     switch (addr) {
     79     case MPC8544_GUTS_ADDR_PVR:
     80         value = env->spr[SPR_PVR];
     81         break;
     82     case MPC8544_GUTS_ADDR_SVR:
     83         value = env->spr[SPR_E500_SVR];
     84         break;
     85     default:
     86         qemu_log_mask(LOG_GUEST_ERROR,
     87                       "%s: Unknown register 0x%" HWADDR_PRIx "\n",
     88                       __func__, addr);
     89         break;
     90     }
     91 
     92     return value;
     93 }
     94 
     95 static void mpc8544_guts_write(void *opaque, hwaddr addr,
     96                                uint64_t value, unsigned size)
     97 {
     98     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
     99 
    100     switch (addr) {
    101     case MPC8544_GUTS_ADDR_RSTCR:
    102         if (value & MPC8544_GUTS_RSTCR_RESET) {
    103             qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
    104         }
    105         break;
    106     default:
    107         qemu_log_mask(LOG_GUEST_ERROR, "%s: Unknown register 0x%" HWADDR_PRIx
    108                        " = 0x%" PRIx64 "\n", __func__, addr, value);
    109         break;
    110     }
    111 }
    112 
    113 static const MemoryRegionOps mpc8544_guts_ops = {
    114     .read = mpc8544_guts_read,
    115     .write = mpc8544_guts_write,
    116     .endianness = DEVICE_BIG_ENDIAN,
    117     .valid = {
    118         .min_access_size = 4,
    119         .max_access_size = 4,
    120     },
    121 };
    122 
    123 static void mpc8544_guts_initfn(Object *obj)
    124 {
    125     SysBusDevice *d = SYS_BUS_DEVICE(obj);
    126     GutsState *s = MPC8544_GUTS(obj);
    127 
    128     memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
    129                           "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
    130     sysbus_init_mmio(d, &s->iomem);
    131 }
    132 
    133 static const TypeInfo mpc8544_guts_info = {
    134     .name          = TYPE_MPC8544_GUTS,
    135     .parent        = TYPE_SYS_BUS_DEVICE,
    136     .instance_size = sizeof(GutsState),
    137     .instance_init = mpc8544_guts_initfn,
    138 };
    139 
    140 static void mpc8544_guts_register_types(void)
    141 {
    142     type_register_static(&mpc8544_guts_info);
    143 }
    144 
    145 type_init(mpc8544_guts_register_types)