e1000x_common.c (8116B)
1 /* 2 * QEMU e1000(e) emulation - shared code 3 * 4 * Copyright (c) 2008 Qumranet 5 * 6 * Based on work done by: 7 * Nir Peleg, Tutis Systems Ltd. for Qumranet Inc. 8 * Copyright (c) 2007 Dan Aloni 9 * Copyright (c) 2004 Antony T Curtis 10 * 11 * This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU Lesser General Public 13 * License as published by the Free Software Foundation; either 14 * version 2.1 of the License, or (at your option) any later version. 15 * 16 * This library is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * Lesser General Public License for more details. 20 * 21 * You should have received a copy of the GNU Lesser General Public 22 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "hw/pci/pci.h" 28 #include "net/net.h" 29 30 #include "e1000x_common.h" 31 32 #include "trace.h" 33 34 bool e1000x_rx_ready(PCIDevice *d, uint32_t *mac) 35 { 36 bool link_up = mac[STATUS] & E1000_STATUS_LU; 37 bool rx_enabled = mac[RCTL] & E1000_RCTL_EN; 38 bool pci_master = d->config[PCI_COMMAND] & PCI_COMMAND_MASTER; 39 40 if (!link_up || !rx_enabled || !pci_master) { 41 trace_e1000x_rx_can_recv_disabled(link_up, rx_enabled, pci_master); 42 return false; 43 } 44 45 return true; 46 } 47 48 bool e1000x_is_vlan_packet(const uint8_t *buf, uint16_t vet) 49 { 50 uint16_t eth_proto = lduw_be_p(buf + 12); 51 bool res = (eth_proto == vet); 52 53 trace_e1000x_vlan_is_vlan_pkt(res, eth_proto, vet); 54 55 return res; 56 } 57 58 bool e1000x_rx_group_filter(uint32_t *mac, const uint8_t *buf) 59 { 60 static const int mta_shift[] = { 4, 3, 2, 0 }; 61 uint32_t f, ra[2], *rp, rctl = mac[RCTL]; 62 63 for (rp = mac + RA; rp < mac + RA + 32; rp += 2) { 64 if (!(rp[1] & E1000_RAH_AV)) { 65 continue; 66 } 67 ra[0] = cpu_to_le32(rp[0]); 68 ra[1] = cpu_to_le32(rp[1]); 69 if (!memcmp(buf, (uint8_t *)ra, 6)) { 70 trace_e1000x_rx_flt_ucast_match((int)(rp - mac - RA) / 2, 71 MAC_ARG(buf)); 72 return true; 73 } 74 } 75 trace_e1000x_rx_flt_ucast_mismatch(MAC_ARG(buf)); 76 77 f = mta_shift[(rctl >> E1000_RCTL_MO_SHIFT) & 3]; 78 f = (((buf[5] << 8) | buf[4]) >> f) & 0xfff; 79 if (mac[MTA + (f >> 5)] & (1 << (f & 0x1f))) { 80 e1000x_inc_reg_if_not_full(mac, MPRC); 81 return true; 82 } 83 84 trace_e1000x_rx_flt_inexact_mismatch(MAC_ARG(buf), 85 (rctl >> E1000_RCTL_MO_SHIFT) & 3, 86 f >> 5, 87 mac[MTA + (f >> 5)]); 88 89 return false; 90 } 91 92 bool e1000x_hw_rx_enabled(uint32_t *mac) 93 { 94 if (!(mac[STATUS] & E1000_STATUS_LU)) { 95 trace_e1000x_rx_link_down(mac[STATUS]); 96 return false; 97 } 98 99 if (!(mac[RCTL] & E1000_RCTL_EN)) { 100 trace_e1000x_rx_disabled(mac[RCTL]); 101 return false; 102 } 103 104 return true; 105 } 106 107 bool e1000x_is_oversized(uint32_t *mac, size_t size) 108 { 109 /* this is the size past which hardware will 110 drop packets when setting LPE=0 */ 111 static const int maximum_ethernet_vlan_size = 1522; 112 /* this is the size past which hardware will 113 drop packets when setting LPE=1 */ 114 static const int maximum_ethernet_lpe_size = 16 * KiB; 115 116 if ((size > maximum_ethernet_lpe_size || 117 (size > maximum_ethernet_vlan_size 118 && !(mac[RCTL] & E1000_RCTL_LPE))) 119 && !(mac[RCTL] & E1000_RCTL_SBP)) { 120 e1000x_inc_reg_if_not_full(mac, ROC); 121 trace_e1000x_rx_oversized(size); 122 return true; 123 } 124 125 return false; 126 } 127 128 void e1000x_restart_autoneg(uint32_t *mac, uint16_t *phy, QEMUTimer *timer) 129 { 130 e1000x_update_regs_on_link_down(mac, phy); 131 trace_e1000x_link_negotiation_start(); 132 timer_mod(timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500); 133 } 134 135 void e1000x_reset_mac_addr(NICState *nic, uint32_t *mac_regs, 136 uint8_t *mac_addr) 137 { 138 int i; 139 140 mac_regs[RA] = 0; 141 mac_regs[RA + 1] = E1000_RAH_AV; 142 for (i = 0; i < 4; i++) { 143 mac_regs[RA] |= mac_addr[i] << (8 * i); 144 mac_regs[RA + 1] |= 145 (i < 2) ? mac_addr[i + 4] << (8 * i) : 0; 146 } 147 148 qemu_format_nic_info_str(qemu_get_queue(nic), mac_addr); 149 trace_e1000x_mac_indicate(MAC_ARG(mac_addr)); 150 } 151 152 void e1000x_update_regs_on_autoneg_done(uint32_t *mac, uint16_t *phy) 153 { 154 e1000x_update_regs_on_link_up(mac, phy); 155 phy[PHY_LP_ABILITY] |= MII_LPAR_LPACK; 156 phy[PHY_STATUS] |= MII_SR_AUTONEG_COMPLETE; 157 trace_e1000x_link_negotiation_done(); 158 } 159 160 void 161 e1000x_core_prepare_eeprom(uint16_t *eeprom, 162 const uint16_t *templ, 163 uint32_t templ_size, 164 uint16_t dev_id, 165 const uint8_t *macaddr) 166 { 167 uint16_t checksum = 0; 168 int i; 169 170 memmove(eeprom, templ, templ_size); 171 172 for (i = 0; i < 3; i++) { 173 eeprom[i] = (macaddr[2 * i + 1] << 8) | macaddr[2 * i]; 174 } 175 176 eeprom[11] = eeprom[13] = dev_id; 177 178 for (i = 0; i < EEPROM_CHECKSUM_REG; i++) { 179 checksum += eeprom[i]; 180 } 181 182 checksum = (uint16_t) EEPROM_SUM - checksum; 183 184 eeprom[EEPROM_CHECKSUM_REG] = checksum; 185 } 186 187 uint32_t 188 e1000x_rxbufsize(uint32_t rctl) 189 { 190 rctl &= E1000_RCTL_BSEX | E1000_RCTL_SZ_16384 | E1000_RCTL_SZ_8192 | 191 E1000_RCTL_SZ_4096 | E1000_RCTL_SZ_2048 | E1000_RCTL_SZ_1024 | 192 E1000_RCTL_SZ_512 | E1000_RCTL_SZ_256; 193 switch (rctl) { 194 case E1000_RCTL_BSEX | E1000_RCTL_SZ_16384: 195 return 16384; 196 case E1000_RCTL_BSEX | E1000_RCTL_SZ_8192: 197 return 8192; 198 case E1000_RCTL_BSEX | E1000_RCTL_SZ_4096: 199 return 4096; 200 case E1000_RCTL_SZ_1024: 201 return 1024; 202 case E1000_RCTL_SZ_512: 203 return 512; 204 case E1000_RCTL_SZ_256: 205 return 256; 206 } 207 return 2048; 208 } 209 210 void 211 e1000x_update_rx_total_stats(uint32_t *mac, 212 size_t data_size, 213 size_t data_fcs_size) 214 { 215 static const int PRCregs[6] = { PRC64, PRC127, PRC255, PRC511, 216 PRC1023, PRC1522 }; 217 218 e1000x_increase_size_stats(mac, PRCregs, data_fcs_size); 219 e1000x_inc_reg_if_not_full(mac, TPR); 220 mac[GPRC] = mac[TPR]; 221 /* TOR - Total Octets Received: 222 * This register includes bytes received in a packet from the <Destination 223 * Address> field through the <CRC> field, inclusively. 224 * Always include FCS length (4) in size. 225 */ 226 e1000x_grow_8reg_if_not_full(mac, TORL, data_size + 4); 227 mac[GORCL] = mac[TORL]; 228 mac[GORCH] = mac[TORH]; 229 } 230 231 void 232 e1000x_increase_size_stats(uint32_t *mac, const int *size_regs, int size) 233 { 234 if (size > 1023) { 235 e1000x_inc_reg_if_not_full(mac, size_regs[5]); 236 } else if (size > 511) { 237 e1000x_inc_reg_if_not_full(mac, size_regs[4]); 238 } else if (size > 255) { 239 e1000x_inc_reg_if_not_full(mac, size_regs[3]); 240 } else if (size > 127) { 241 e1000x_inc_reg_if_not_full(mac, size_regs[2]); 242 } else if (size > 64) { 243 e1000x_inc_reg_if_not_full(mac, size_regs[1]); 244 } else if (size == 64) { 245 e1000x_inc_reg_if_not_full(mac, size_regs[0]); 246 } 247 } 248 249 void 250 e1000x_read_tx_ctx_descr(struct e1000_context_desc *d, 251 e1000x_txd_props *props) 252 { 253 uint32_t op = le32_to_cpu(d->cmd_and_length); 254 255 props->ipcss = d->lower_setup.ip_fields.ipcss; 256 props->ipcso = d->lower_setup.ip_fields.ipcso; 257 props->ipcse = le16_to_cpu(d->lower_setup.ip_fields.ipcse); 258 props->tucss = d->upper_setup.tcp_fields.tucss; 259 props->tucso = d->upper_setup.tcp_fields.tucso; 260 props->tucse = le16_to_cpu(d->upper_setup.tcp_fields.tucse); 261 props->paylen = op & 0xfffff; 262 props->hdr_len = d->tcp_seg_setup.fields.hdr_len; 263 props->mss = le16_to_cpu(d->tcp_seg_setup.fields.mss); 264 props->ip = (op & E1000_TXD_CMD_IP) ? 1 : 0; 265 props->tcp = (op & E1000_TXD_CMD_TCP) ? 1 : 0; 266 props->tse = (op & E1000_TXD_CMD_TSE) ? 1 : 0; 267 }