mipssim.c (8119B)
1 /* 2 * QEMU/mipssim emulation 3 * 4 * Emulates a very simple machine model similar to the one used by the 5 * proprietary MIPS emulator. 6 * 7 * Copyright (c) 2007 Thiemo Seufer 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qapi/error.h" 30 #include "qemu/datadir.h" 31 #include "hw/clock.h" 32 #include "hw/mips/mips.h" 33 #include "hw/mips/cpudevs.h" 34 #include "hw/char/serial.h" 35 #include "hw/isa/isa.h" 36 #include "net/net.h" 37 #include "sysemu/sysemu.h" 38 #include "hw/boards.h" 39 #include "hw/mips/bios.h" 40 #include "hw/loader.h" 41 #include "elf.h" 42 #include "hw/sysbus.h" 43 #include "hw/qdev-properties.h" 44 #include "qemu/error-report.h" 45 #include "sysemu/qtest.h" 46 #include "sysemu/reset.h" 47 48 static struct _loaderparams { 49 int ram_size; 50 const char *kernel_filename; 51 const char *kernel_cmdline; 52 const char *initrd_filename; 53 } loaderparams; 54 55 typedef struct ResetData { 56 MIPSCPU *cpu; 57 uint64_t vector; 58 } ResetData; 59 60 static uint64_t load_kernel(void) 61 { 62 uint64_t entry, kernel_high, initrd_size; 63 long kernel_size; 64 ram_addr_t initrd_offset; 65 int big_endian; 66 67 #if TARGET_BIG_ENDIAN 68 big_endian = 1; 69 #else 70 big_endian = 0; 71 #endif 72 73 kernel_size = load_elf(loaderparams.kernel_filename, NULL, 74 cpu_mips_kseg0_to_phys, NULL, 75 &entry, NULL, 76 &kernel_high, NULL, big_endian, 77 EM_MIPS, 1, 0); 78 if (kernel_size < 0) { 79 error_report("could not load kernel '%s': %s", 80 loaderparams.kernel_filename, 81 load_elf_strerror(kernel_size)); 82 exit(1); 83 } 84 85 /* load initrd */ 86 initrd_size = 0; 87 initrd_offset = 0; 88 if (loaderparams.initrd_filename) { 89 initrd_size = get_image_size(loaderparams.initrd_filename); 90 if (initrd_size > 0) { 91 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE); 92 if (initrd_offset + initrd_size > loaderparams.ram_size) { 93 error_report("memory too small for initial ram disk '%s'", 94 loaderparams.initrd_filename); 95 exit(1); 96 } 97 initrd_size = load_image_targphys(loaderparams.initrd_filename, 98 initrd_offset, loaderparams.ram_size - initrd_offset); 99 } 100 if (initrd_size == (target_ulong) -1) { 101 error_report("could not load initial ram disk '%s'", 102 loaderparams.initrd_filename); 103 exit(1); 104 } 105 } 106 return entry; 107 } 108 109 static void main_cpu_reset(void *opaque) 110 { 111 ResetData *s = (ResetData *)opaque; 112 CPUMIPSState *env = &s->cpu->env; 113 114 cpu_reset(CPU(s->cpu)); 115 env->active_tc.PC = s->vector & ~(target_ulong)1; 116 if (s->vector & 1) { 117 env->hflags |= MIPS_HFLAG_M16; 118 } 119 } 120 121 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) 122 { 123 DeviceState *dev; 124 SysBusDevice *s; 125 126 dev = qdev_new("mipsnet"); 127 qdev_set_nic_properties(dev, nd); 128 129 s = SYS_BUS_DEVICE(dev); 130 sysbus_realize_and_unref(s, &error_fatal); 131 sysbus_connect_irq(s, 0, irq); 132 memory_region_add_subregion(get_system_io(), 133 base, 134 sysbus_mmio_get_region(s, 0)); 135 } 136 137 static void 138 mips_mipssim_init(MachineState *machine) 139 { 140 const char *kernel_filename = machine->kernel_filename; 141 const char *kernel_cmdline = machine->kernel_cmdline; 142 const char *initrd_filename = machine->initrd_filename; 143 char *filename; 144 MemoryRegion *address_space_mem = get_system_memory(); 145 MemoryRegion *isa = g_new(MemoryRegion, 1); 146 MemoryRegion *bios = g_new(MemoryRegion, 1); 147 Clock *cpuclk; 148 MIPSCPU *cpu; 149 CPUMIPSState *env; 150 ResetData *reset_info; 151 int bios_size; 152 153 cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); 154 #ifdef TARGET_MIPS64 155 clock_set_hz(cpuclk, 6000000); /* 6 MHz */ 156 #else 157 clock_set_hz(cpuclk, 12000000); /* 12 MHz */ 158 #endif 159 160 /* Init CPUs. */ 161 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk); 162 env = &cpu->env; 163 164 reset_info = g_new0(ResetData, 1); 165 reset_info->cpu = cpu; 166 reset_info->vector = env->active_tc.PC; 167 qemu_register_reset(main_cpu_reset, reset_info); 168 169 /* Allocate RAM. */ 170 memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, 171 &error_fatal); 172 173 memory_region_add_subregion(address_space_mem, 0, machine->ram); 174 175 /* Map the BIOS / boot exception handler. */ 176 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); 177 /* Load a BIOS / boot exception handler image. */ 178 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: BIOS_FILENAME); 179 if (filename) { 180 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE); 181 g_free(filename); 182 } else { 183 bios_size = -1; 184 } 185 if ((bios_size < 0 || bios_size > BIOS_SIZE) && 186 machine->firmware && !qtest_enabled()) { 187 /* Bail out if we have neither a kernel image nor boot vector code. */ 188 error_report("Could not load MIPS bios '%s'", machine->firmware); 189 exit(1); 190 } else { 191 /* We have a boot vector start address. */ 192 env->active_tc.PC = (target_long)(int32_t)0xbfc00000; 193 } 194 195 if (kernel_filename) { 196 loaderparams.ram_size = machine->ram_size; 197 loaderparams.kernel_filename = kernel_filename; 198 loaderparams.kernel_cmdline = kernel_cmdline; 199 loaderparams.initrd_filename = initrd_filename; 200 reset_info->vector = load_kernel(); 201 } 202 203 /* Init CPU internal devices. */ 204 cpu_mips_irq_init_cpu(cpu); 205 cpu_mips_clock_init(cpu); 206 207 /* Register 64 KB of ISA IO space at 0x1fd00000. */ 208 memory_region_init_alias(isa, NULL, "isa_mmio", 209 get_system_io(), 0, 0x00010000); 210 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa); 211 212 /* 213 * A single 16450 sits at offset 0x3f8. It is attached to 214 * MIPS CPU INT2, which is interrupt 4. 215 */ 216 if (serial_hd(0)) { 217 DeviceState *dev = qdev_new(TYPE_SERIAL_MM); 218 219 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); 220 qdev_prop_set_uint8(dev, "regshift", 0); 221 qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN); 222 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 223 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); 224 sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, 225 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); 226 } 227 228 if (nd_table[0].used) 229 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ 230 mipsnet_init(0x4200, env->irq[2], &nd_table[0]); 231 } 232 233 static void mips_mipssim_machine_init(MachineClass *mc) 234 { 235 mc->desc = "MIPS MIPSsim platform"; 236 mc->init = mips_mipssim_init; 237 #ifdef TARGET_MIPS64 238 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf"); 239 #else 240 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); 241 #endif 242 mc->default_ram_id = "mips_mipssim.ram"; 243 } 244 245 DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)