qemu

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microbit_i2c.c (3698B)

      1 /*
      2  * Microbit stub for Nordic Semiconductor nRF51 SoC Two-Wire Interface
      3  * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf
      4  *
      5  * This is a microbit-specific stub for the TWI controller on the nRF51 SoC.
      6  * We don't emulate I2C devices but the firmware probes the
      7  * accelerometer/magnetometer on startup and panics if they are not found.
      8  * Therefore we stub out the probing.
      9  *
     10  * In the future this file could evolve into a full nRF51 TWI controller
     11  * device.
     12  *
     13  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
     14  * Copyright 2019 Red Hat, Inc.
     15  *
     16  * This code is licensed under the GPL version 2 or later.  See
     17  * the COPYING file in the top-level directory.
     18  */
     19 
     20 #include "qemu/osdep.h"
     21 #include "qemu/log.h"
     22 #include "qemu/module.h"
     23 #include "hw/i2c/microbit_i2c.h"
     24 #include "migration/vmstate.h"
     25 
     26 static const uint32_t twi_read_sequence[] = {0x5A, 0x5A, 0x40};
     27 
     28 static uint64_t microbit_i2c_read(void *opaque, hwaddr addr, unsigned int size)
     29 {
     30     MicrobitI2CState *s = opaque;
     31     uint64_t data = 0x00;
     32 
     33     switch (addr) {
     34     case NRF51_TWI_EVENT_STOPPED:
     35         data = 0x01;
     36         break;
     37     case NRF51_TWI_EVENT_RXDREADY:
     38         data = 0x01;
     39         break;
     40     case NRF51_TWI_EVENT_TXDSENT:
     41         data = 0x01;
     42         break;
     43     case NRF51_TWI_REG_RXD:
     44         data = twi_read_sequence[s->read_idx];
     45         if (s->read_idx < G_N_ELEMENTS(twi_read_sequence)) {
     46             s->read_idx++;
     47         }
     48         break;
     49     default:
     50         data = s->regs[addr / sizeof(s->regs[0])];
     51         break;
     52     }
     53 
     54     qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u] = %" PRIx32 "\n",
     55                   __func__, addr, size, (uint32_t)data);
     56 
     57 
     58     return data;
     59 }
     60 
     61 static void microbit_i2c_write(void *opaque, hwaddr addr, uint64_t data,
     62                                unsigned int size)
     63 {
     64     MicrobitI2CState *s = opaque;
     65 
     66     qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n",
     67                   __func__, addr, data, size);
     68     s->regs[addr / sizeof(s->regs[0])] = data;
     69 }
     70 
     71 static const MemoryRegionOps microbit_i2c_ops = {
     72     .read = microbit_i2c_read,
     73     .write = microbit_i2c_write,
     74     .endianness = DEVICE_LITTLE_ENDIAN,
     75     .impl.min_access_size = 4,
     76     .impl.max_access_size = 4,
     77 };
     78 
     79 static const VMStateDescription microbit_i2c_vmstate = {
     80     .name = TYPE_MICROBIT_I2C,
     81     .version_id = 1,
     82     .minimum_version_id = 1,
     83     .fields = (VMStateField[]) {
     84         VMSTATE_UINT32_ARRAY(regs, MicrobitI2CState, MICROBIT_I2C_NREGS),
     85         VMSTATE_UINT32(read_idx, MicrobitI2CState),
     86         VMSTATE_END_OF_LIST()
     87     },
     88 };
     89 
     90 static void microbit_i2c_reset(DeviceState *dev)
     91 {
     92     MicrobitI2CState *s = MICROBIT_I2C(dev);
     93 
     94     memset(s->regs, 0, sizeof(s->regs));
     95     s->read_idx = 0;
     96 }
     97 
     98 static void microbit_i2c_realize(DeviceState *dev, Error **errp)
     99 {
    100     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
    101     MicrobitI2CState *s = MICROBIT_I2C(dev);
    102 
    103     memory_region_init_io(&s->iomem, OBJECT(s), &microbit_i2c_ops, s,
    104                           "microbit.twi", NRF51_PERIPHERAL_SIZE);
    105     sysbus_init_mmio(sbd, &s->iomem);
    106 }
    107 
    108 static void microbit_i2c_class_init(ObjectClass *klass, void *data)
    109 {
    110     DeviceClass *dc = DEVICE_CLASS(klass);
    111 
    112     dc->vmsd = &microbit_i2c_vmstate;
    113     dc->reset = microbit_i2c_reset;
    114     dc->realize = microbit_i2c_realize;
    115     dc->desc = "Microbit I2C controller";
    116 }
    117 
    118 static const TypeInfo microbit_i2c_info = {
    119     .name = TYPE_MICROBIT_I2C,
    120     .parent = TYPE_SYS_BUS_DEVICE,
    121     .instance_size = sizeof(MicrobitI2CState),
    122     .class_init = microbit_i2c_class_init,
    123 };
    124 
    125 static void microbit_i2c_register_types(void)
    126 {
    127     type_register_static(&microbit_i2c_info);
    128 }
    129 
    130 type_init(microbit_i2c_register_types)