qemu

FORK: QEMU emulator
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hppa_hardware.h (1710B)


      1 /* HPPA cores and system support chips.  */
      2 /* Be aware: QEMU and seabios-hppa repositories share this file as-is. */
      3 
      4 #ifndef HW_HPPA_HPPA_HARDWARE_H
      5 #define HW_HPPA_HPPA_HARDWARE_H
      6 
      7 #define FIRMWARE_START  0xf0000000
      8 #define FIRMWARE_END    0xf0800000
      9 
     10 #define DEVICE_HPA_LEN  0x00100000
     11 
     12 #define GSC_HPA         0xffc00000
     13 #define DINO_HPA        0xfff80000
     14 #define DINO_UART_HPA   0xfff83000
     15 #define  DINO_UART_BASE 0xfff83800
     16 #define DINO_SCSI_HPA   0xfff8c000
     17 #define LASI_HPA        0xffd00000
     18 #define LASI_UART_HPA   0xffd05000
     19 #define LASI_SCSI_HPA   0xffd06000
     20 #define LASI_LAN_HPA    0xffd07000
     21 #define LASI_RTC_HPA    0xffd09000
     22 #define LASI_LPT_HPA    0xffd02000
     23 #define LASI_AUDIO_HPA  0xffd04000
     24 #define LASI_PS2KBD_HPA 0xffd08000
     25 #define LASI_PS2MOU_HPA 0xffd08100
     26 #define LASI_GFX_HPA    0xf8000000
     27 #define ARTIST_FB_ADDR  0xf9000000
     28 #define CPU_HPA         0xfffb0000
     29 #define MEMORY_HPA      0xfffff000
     30 
     31 #define PCI_HPA         DINO_HPA        /* PCI bus */
     32 #define IDE_HPA         0xf9000000      /* Boot disc controller */
     33 
     34 /* offsets to DINO HPA: */
     35 #define DINO_PCI_ADDR           0x064
     36 #define DINO_CONFIG_DATA        0x068
     37 #define DINO_IO_DATA            0x06c
     38 
     39 #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
     40 #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)
     41 
     42 #define FW_CFG_IO_BASE  0xfffa0000
     43 
     44 #define PORT_SERIAL1    (LASI_UART_HPA + 0x800)
     45 #define PORT_SERIAL2    (DINO_UART_HPA + 0x800)
     46 
     47 #define HPPA_MAX_CPUS   16      /* max. number of SMP CPUs */
     48 #define CPU_CLOCK_MHZ   250     /* emulate a 250 MHz CPU */
     49 
     50 #define CPU_HPA_CR_REG  7       /* store CPU HPA in cr7 (SeaBIOS internal) */
     51 #define PIM_STORAGE_SIZE 600	/* storage size of pdc_pim_toc_struct (64bit) */
     52 
     53 #endif