npcm7xx_boards.c (19314B)
1 /* 2 * Machine definitions for boards featuring an NPCM7xx SoC. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 */ 16 17 #include "qemu/osdep.h" 18 19 #include "hw/arm/npcm7xx.h" 20 #include "hw/core/cpu.h" 21 #include "hw/i2c/i2c_mux_pca954x.h" 22 #include "hw/i2c/smbus_eeprom.h" 23 #include "hw/loader.h" 24 #include "hw/qdev-core.h" 25 #include "hw/qdev-properties.h" 26 #include "qapi/error.h" 27 #include "qemu/datadir.h" 28 #include "qemu/units.h" 29 #include "sysemu/blockdev.h" 30 #include "sysemu/sysemu.h" 31 #include "sysemu/block-backend.h" 32 33 #define NPCM7XX_POWER_ON_STRAPS_DEFAULT ( \ 34 NPCM7XX_PWRON_STRAP_SPI0F18 | \ 35 NPCM7XX_PWRON_STRAP_SFAB | \ 36 NPCM7XX_PWRON_STRAP_BSPA | \ 37 NPCM7XX_PWRON_STRAP_FUP(FUP_NORM_UART2) | \ 38 NPCM7XX_PWRON_STRAP_SECEN | \ 39 NPCM7XX_PWRON_STRAP_HIZ | \ 40 NPCM7XX_PWRON_STRAP_ECC | \ 41 NPCM7XX_PWRON_STRAP_RESERVE1 | \ 42 NPCM7XX_PWRON_STRAP_J2EN | \ 43 NPCM7XX_PWRON_STRAP_CKFRQ(CKFRQ_DEFAULT)) 44 45 #define NPCM750_EVB_POWER_ON_STRAPS ( \ 46 NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_J2EN) 47 #define QUANTA_GSJ_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT 48 #define QUANTA_GBS_POWER_ON_STRAPS ( \ 49 NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_SFAB) 50 #define KUDO_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT 51 #define MORI_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT 52 53 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin"; 54 55 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc) 56 { 57 const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom; 58 g_autofree char *filename = NULL; 59 int ret; 60 61 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 62 if (!filename) { 63 error_report("Could not find ROM image '%s'", bios_name); 64 if (!machine->kernel_filename) { 65 /* We can't boot without a bootrom or a kernel image. */ 66 exit(1); 67 } 68 return; 69 } 70 ret = load_image_mr(filename, &soc->irom); 71 if (ret < 0) { 72 error_report("Failed to load ROM image '%s'", filename); 73 exit(1); 74 } 75 } 76 77 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no, 78 const char *flash_type, DriveInfo *dinfo) 79 { 80 DeviceState *flash; 81 qemu_irq flash_cs; 82 83 flash = qdev_new(flash_type); 84 if (dinfo) { 85 qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo)); 86 } 87 qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal); 88 89 flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0); 90 qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs); 91 } 92 93 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram) 94 { 95 memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram); 96 97 object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram), 98 &error_abort); 99 } 100 101 static void sdhci_attach_drive(SDHCIState *sdhci, int unit) 102 { 103 DriveInfo *di = drive_get(IF_SD, 0, unit); 104 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; 105 106 BusState *bus = qdev_get_child_bus(DEVICE(sdhci), "sd-bus"); 107 if (bus == NULL) { 108 error_report("No SD bus found in SOC object"); 109 exit(1); 110 } 111 112 DeviceState *carddev = qdev_new(TYPE_SD_CARD); 113 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); 114 qdev_realize_and_unref(carddev, bus, &error_fatal); 115 } 116 117 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine, 118 uint32_t hw_straps) 119 { 120 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine); 121 MachineClass *mc = MACHINE_CLASS(nmc); 122 Object *obj; 123 124 if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { 125 error_report("This board can only be used with %s", 126 mc->default_cpu_type); 127 exit(1); 128 } 129 130 obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc", 131 &error_abort, NULL); 132 object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort); 133 134 return NPCM7XX(obj); 135 } 136 137 static I2CBus *npcm7xx_i2c_get_bus(NPCM7xxState *soc, uint32_t num) 138 { 139 g_assert(num < ARRAY_SIZE(soc->smbus)); 140 return I2C_BUS(qdev_get_child_bus(DEVICE(&soc->smbus[num]), "i2c-bus")); 141 } 142 143 static void at24c_eeprom_init(NPCM7xxState *soc, int bus, uint8_t addr, 144 uint32_t rsize) 145 { 146 I2CBus *i2c_bus = npcm7xx_i2c_get_bus(soc, bus); 147 I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr); 148 DeviceState *dev = DEVICE(i2c_dev); 149 150 qdev_prop_set_uint32(dev, "rom-size", rsize); 151 i2c_slave_realize_and_unref(i2c_dev, i2c_bus, &error_abort); 152 } 153 154 static void npcm7xx_init_pwm_splitter(NPCM7xxMachine *machine, 155 NPCM7xxState *soc, const int *fan_counts) 156 { 157 SplitIRQ *splitters = machine->fan_splitter; 158 159 /* 160 * PWM 0~3 belong to module 0 output 0~3. 161 * PWM 4~7 belong to module 1 output 0~3. 162 */ 163 for (int i = 0; i < NPCM7XX_NR_PWM_MODULES; ++i) { 164 for (int j = 0; j < NPCM7XX_PWM_PER_MODULE; ++j) { 165 int splitter_no = i * NPCM7XX_PWM_PER_MODULE + j; 166 DeviceState *splitter; 167 168 if (fan_counts[splitter_no] < 1) { 169 continue; 170 } 171 object_initialize_child(OBJECT(machine), "fan-splitter[*]", 172 &splitters[splitter_no], TYPE_SPLIT_IRQ); 173 splitter = DEVICE(&splitters[splitter_no]); 174 qdev_prop_set_uint16(splitter, "num-lines", 175 fan_counts[splitter_no]); 176 qdev_realize(splitter, NULL, &error_abort); 177 qdev_connect_gpio_out_named(DEVICE(&soc->pwm[i]), "duty-gpio-out", 178 j, qdev_get_gpio_in(splitter, 0)); 179 } 180 } 181 } 182 183 static void npcm7xx_connect_pwm_fan(NPCM7xxState *soc, SplitIRQ *splitter, 184 int fan_no, int output_no) 185 { 186 DeviceState *fan; 187 int fan_input; 188 qemu_irq fan_duty_gpio; 189 190 g_assert(fan_no >= 0 && fan_no <= NPCM7XX_MFT_MAX_FAN_INPUT); 191 /* 192 * Fan 0~1 belong to module 0 input 0~1. 193 * Fan 2~3 belong to module 1 input 0~1. 194 * ... 195 * Fan 14~15 belong to module 7 input 0~1. 196 * Fan 16~17 belong to module 0 input 2~3. 197 * Fan 18~19 belong to module 1 input 2~3. 198 */ 199 if (fan_no < 16) { 200 fan = DEVICE(&soc->mft[fan_no / 2]); 201 fan_input = fan_no % 2; 202 } else { 203 fan = DEVICE(&soc->mft[(fan_no - 16) / 2]); 204 fan_input = fan_no % 2 + 2; 205 } 206 207 /* Connect the Fan to PWM module */ 208 fan_duty_gpio = qdev_get_gpio_in_named(fan, "duty", fan_input); 209 qdev_connect_gpio_out(DEVICE(splitter), output_no, fan_duty_gpio); 210 } 211 212 static void npcm750_evb_i2c_init(NPCM7xxState *soc) 213 { 214 /* lm75 temperature sensor on SVB, tmp105 is compatible */ 215 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 0), "tmp105", 0x48); 216 /* lm75 temperature sensor on EB, tmp105 is compatible */ 217 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x48); 218 /* tmp100 temperature sensor on EB, tmp105 is compatible */ 219 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x48); 220 /* tmp100 temperature sensor on SVB, tmp105 is compatible */ 221 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 6), "tmp105", 0x48); 222 } 223 224 static void npcm750_evb_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc) 225 { 226 SplitIRQ *splitter = machine->fan_splitter; 227 static const int fan_counts[] = {2, 2, 2, 2, 2, 2, 2, 2}; 228 229 npcm7xx_init_pwm_splitter(machine, soc, fan_counts); 230 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0); 231 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1); 232 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0); 233 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1); 234 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0); 235 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1); 236 npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x06, 0); 237 npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x07, 1); 238 npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x08, 0); 239 npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x09, 1); 240 npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0a, 0); 241 npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0b, 1); 242 npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0c, 0); 243 npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0d, 1); 244 npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0e, 0); 245 npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0f, 1); 246 } 247 248 static void quanta_gsj_i2c_init(NPCM7xxState *soc) 249 { 250 /* GSJ machine have 4 max31725 temperature sensors, tmp105 is compatible. */ 251 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x5c); 252 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x5c); 253 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 3), "tmp105", 0x5c); 254 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), "tmp105", 0x5c); 255 256 at24c_eeprom_init(soc, 9, 0x55, 8192); 257 at24c_eeprom_init(soc, 10, 0x55, 8192); 258 259 /* 260 * i2c-11: 261 * - power-brick@36: delta,dps800 262 * - hotswap@15: ti,lm5066i 263 */ 264 265 /* 266 * i2c-12: 267 * - ucd90160@6b 268 */ 269 270 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 15), "pca9548", 0x75); 271 } 272 273 static void quanta_gsj_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc) 274 { 275 SplitIRQ *splitter = machine->fan_splitter; 276 static const int fan_counts[] = {2, 2, 2, 0, 0, 0, 0, 0}; 277 278 npcm7xx_init_pwm_splitter(machine, soc, fan_counts); 279 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0); 280 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1); 281 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0); 282 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1); 283 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0); 284 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1); 285 } 286 287 static void quanta_gbs_i2c_init(NPCM7xxState *soc) 288 { 289 /* 290 * i2c-0: 291 * pca9546@71 292 * 293 * i2c-1: 294 * pca9535@24 295 * pca9535@20 296 * pca9535@21 297 * pca9535@22 298 * pca9535@23 299 * pca9535@25 300 * pca9535@26 301 * 302 * i2c-2: 303 * sbtsi@4c 304 * 305 * i2c-5: 306 * atmel,24c64@50 mb_fru 307 * pca9546@71 308 * - channel 0: max31725@54 309 * - channel 1: max31725@55 310 * - channel 2: max31725@5d 311 * atmel,24c64@51 fan_fru 312 * - channel 3: atmel,24c64@52 hsbp_fru 313 * 314 * i2c-6: 315 * pca9545@73 316 * 317 * i2c-7: 318 * pca9545@72 319 * 320 * i2c-8: 321 * adi,adm1272@10 322 * 323 * i2c-9: 324 * pca9546@71 325 * - channel 0: isil,isl68137@60 326 * - channel 1: isil,isl68137@61 327 * - channel 2: isil,isl68137@63 328 * - channel 3: isil,isl68137@45 329 * 330 * i2c-10: 331 * pca9545@71 332 * 333 * i2c-11: 334 * pca9545@76 335 * 336 * i2c-12: 337 * maxim,max34451@4e 338 * isil,isl68137@5d 339 * isil,isl68137@5e 340 * 341 * i2c-14: 342 * pca9545@70 343 */ 344 } 345 346 static void kudo_bmc_i2c_init(NPCM7xxState *soc) 347 { 348 I2CSlave *i2c_mux; 349 350 i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), 351 TYPE_PCA9548, 0x75); 352 353 /* tmp105 is compatible with the lm75 */ 354 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x5c); 355 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x5c); 356 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), "tmp105", 0x5c); 357 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), "tmp105", 0x5c); 358 359 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), TYPE_PCA9548, 0x77); 360 361 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), TYPE_PCA9548, 0x77); 362 363 at24c_eeprom_init(soc, 4, 0x50, 8192); /* mbfru */ 364 365 i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 13), 366 TYPE_PCA9548, 0x77); 367 368 /* tmp105 is compatible with the lm75 */ 369 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 2), "tmp105", 0x48); 370 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 3), "tmp105", 0x49); 371 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x48); 372 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x49); 373 374 at24c_eeprom_init(soc, 14, 0x55, 8192); /* bmcfru */ 375 376 /* TODO: Add remaining i2c devices. */ 377 } 378 379 static void npcm750_evb_init(MachineState *machine) 380 { 381 NPCM7xxState *soc; 382 383 soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS); 384 npcm7xx_connect_dram(soc, machine->ram); 385 qdev_realize(DEVICE(soc), NULL, &error_fatal); 386 387 npcm7xx_load_bootrom(machine, soc); 388 npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0)); 389 npcm750_evb_i2c_init(soc); 390 npcm750_evb_fan_init(NPCM7XX_MACHINE(machine), soc); 391 npcm7xx_load_kernel(machine, soc); 392 } 393 394 static void quanta_gsj_init(MachineState *machine) 395 { 396 NPCM7xxState *soc; 397 398 soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS); 399 npcm7xx_connect_dram(soc, machine->ram); 400 qdev_realize(DEVICE(soc), NULL, &error_fatal); 401 402 npcm7xx_load_bootrom(machine, soc); 403 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e", 404 drive_get(IF_MTD, 0, 0)); 405 quanta_gsj_i2c_init(soc); 406 quanta_gsj_fan_init(NPCM7XX_MACHINE(machine), soc); 407 npcm7xx_load_kernel(machine, soc); 408 } 409 410 static void quanta_gbs_init(MachineState *machine) 411 { 412 NPCM7xxState *soc; 413 414 soc = npcm7xx_create_soc(machine, QUANTA_GBS_POWER_ON_STRAPS); 415 npcm7xx_connect_dram(soc, machine->ram); 416 qdev_realize(DEVICE(soc), NULL, &error_fatal); 417 418 npcm7xx_load_bootrom(machine, soc); 419 420 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f", 421 drive_get(IF_MTD, 0, 0)); 422 423 quanta_gbs_i2c_init(soc); 424 sdhci_attach_drive(&soc->mmc.sdhci, 0); 425 npcm7xx_load_kernel(machine, soc); 426 } 427 428 static void kudo_bmc_init(MachineState *machine) 429 { 430 NPCM7xxState *soc; 431 432 soc = npcm7xx_create_soc(machine, KUDO_BMC_POWER_ON_STRAPS); 433 npcm7xx_connect_dram(soc, machine->ram); 434 qdev_realize(DEVICE(soc), NULL, &error_fatal); 435 436 npcm7xx_load_bootrom(machine, soc); 437 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f", 438 drive_get(IF_MTD, 0, 0)); 439 npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f", 440 drive_get(IF_MTD, 3, 0)); 441 442 kudo_bmc_i2c_init(soc); 443 sdhci_attach_drive(&soc->mmc.sdhci, 0); 444 npcm7xx_load_kernel(machine, soc); 445 } 446 447 static void mori_bmc_init(MachineState *machine) 448 { 449 NPCM7xxState *soc; 450 451 soc = npcm7xx_create_soc(machine, MORI_BMC_POWER_ON_STRAPS); 452 npcm7xx_connect_dram(soc, machine->ram); 453 qdev_realize(DEVICE(soc), NULL, &error_fatal); 454 455 npcm7xx_load_bootrom(machine, soc); 456 npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f", 457 drive_get(IF_MTD, 3, 0)); 458 459 npcm7xx_load_kernel(machine, soc); 460 } 461 462 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type) 463 { 464 NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type)); 465 MachineClass *mc = MACHINE_CLASS(nmc); 466 467 nmc->soc_type = type; 468 mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus; 469 } 470 471 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data) 472 { 473 MachineClass *mc = MACHINE_CLASS(oc); 474 475 mc->no_floppy = 1; 476 mc->no_cdrom = 1; 477 mc->no_parallel = 1; 478 mc->default_ram_id = "ram"; 479 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); 480 } 481 482 /* 483 * Schematics: 484 * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf 485 */ 486 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data) 487 { 488 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 489 MachineClass *mc = MACHINE_CLASS(oc); 490 491 npcm7xx_set_soc_type(nmc, TYPE_NPCM750); 492 493 mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex-A9)"; 494 mc->init = npcm750_evb_init; 495 mc->default_ram_size = 512 * MiB; 496 }; 497 498 static void gsj_machine_class_init(ObjectClass *oc, void *data) 499 { 500 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 501 MachineClass *mc = MACHINE_CLASS(oc); 502 503 npcm7xx_set_soc_type(nmc, TYPE_NPCM730); 504 505 mc->desc = "Quanta GSJ (Cortex-A9)"; 506 mc->init = quanta_gsj_init; 507 mc->default_ram_size = 512 * MiB; 508 }; 509 510 static void gbs_bmc_machine_class_init(ObjectClass *oc, void *data) 511 { 512 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 513 MachineClass *mc = MACHINE_CLASS(oc); 514 515 npcm7xx_set_soc_type(nmc, TYPE_NPCM730); 516 517 mc->desc = "Quanta GBS (Cortex-A9)"; 518 mc->init = quanta_gbs_init; 519 mc->default_ram_size = 1 * GiB; 520 } 521 522 static void kudo_bmc_machine_class_init(ObjectClass *oc, void *data) 523 { 524 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 525 MachineClass *mc = MACHINE_CLASS(oc); 526 527 npcm7xx_set_soc_type(nmc, TYPE_NPCM730); 528 529 mc->desc = "Kudo BMC (Cortex-A9)"; 530 mc->init = kudo_bmc_init; 531 mc->default_ram_size = 1 * GiB; 532 }; 533 534 static void mori_bmc_machine_class_init(ObjectClass *oc, void *data) 535 { 536 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc); 537 MachineClass *mc = MACHINE_CLASS(oc); 538 539 npcm7xx_set_soc_type(nmc, TYPE_NPCM730); 540 541 mc->desc = "Mori BMC (Cortex-A9)"; 542 mc->init = mori_bmc_init; 543 mc->default_ram_size = 1 * GiB; 544 } 545 546 static const TypeInfo npcm7xx_machine_types[] = { 547 { 548 .name = TYPE_NPCM7XX_MACHINE, 549 .parent = TYPE_MACHINE, 550 .instance_size = sizeof(NPCM7xxMachine), 551 .class_size = sizeof(NPCM7xxMachineClass), 552 .class_init = npcm7xx_machine_class_init, 553 .abstract = true, 554 }, { 555 .name = MACHINE_TYPE_NAME("npcm750-evb"), 556 .parent = TYPE_NPCM7XX_MACHINE, 557 .class_init = npcm750_evb_machine_class_init, 558 }, { 559 .name = MACHINE_TYPE_NAME("quanta-gsj"), 560 .parent = TYPE_NPCM7XX_MACHINE, 561 .class_init = gsj_machine_class_init, 562 }, { 563 .name = MACHINE_TYPE_NAME("quanta-gbs-bmc"), 564 .parent = TYPE_NPCM7XX_MACHINE, 565 .class_init = gbs_bmc_machine_class_init, 566 }, { 567 .name = MACHINE_TYPE_NAME("kudo-bmc"), 568 .parent = TYPE_NPCM7XX_MACHINE, 569 .class_init = kudo_bmc_machine_class_init, 570 }, { 571 .name = MACHINE_TYPE_NAME("mori-bmc"), 572 .parent = TYPE_NPCM7XX_MACHINE, 573 .class_init = mori_bmc_machine_class_init, 574 }, 575 }; 576 577 DEFINE_TYPES(npcm7xx_machine_types)