exynos4_boards.c (6279B)
1 /* 2 * Samsung exynos4 SoC based boards emulation 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved. 5 * Maksim Kozlov <m.kozlov@samsung.com> 6 * Evgeny Voevodin <e.voevodin@samsung.com> 7 * Igor Mitsyanko <i.mitsyanko@samsung.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but WITHOUT 15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 17 * for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 * 22 */ 23 24 #include "qemu/osdep.h" 25 #include "qemu/units.h" 26 #include "qapi/error.h" 27 #include "qemu/error-report.h" 28 #include "hw/sysbus.h" 29 #include "net/net.h" 30 #include "hw/arm/boot.h" 31 #include "exec/address-spaces.h" 32 #include "hw/arm/exynos4210.h" 33 #include "hw/net/lan9118.h" 34 #include "hw/qdev-properties.h" 35 #include "hw/boards.h" 36 #include "hw/irq.h" 37 38 #define SMDK_LAN9118_BASE_ADDR 0x05000000 39 40 typedef enum Exynos4BoardType { 41 EXYNOS4_BOARD_NURI, 42 EXYNOS4_BOARD_SMDKC210, 43 EXYNOS4_NUM_OF_BOARDS 44 } Exynos4BoardType; 45 46 typedef struct Exynos4BoardState { 47 Exynos4210State soc; 48 MemoryRegion dram0_mem; 49 MemoryRegion dram1_mem; 50 } Exynos4BoardState; 51 52 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = { 53 [EXYNOS4_BOARD_NURI] = 0xD33, 54 [EXYNOS4_BOARD_SMDKC210] = 0xB16, 55 }; 56 57 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { 58 [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG, 59 [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG, 60 }; 61 62 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { 63 [EXYNOS4_BOARD_NURI] = 1 * GiB, 64 [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, 65 }; 66 67 static struct arm_boot_info exynos4_board_binfo = { 68 .loader_start = EXYNOS4210_BASE_BOOT_ADDR, 69 .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR, 70 .write_secondary_boot = exynos4210_write_secondary, 71 }; 72 73 static void lan9215_init(uint32_t base, qemu_irq irq) 74 { 75 DeviceState *dev; 76 SysBusDevice *s; 77 78 /* This should be a 9215 but the 9118 is close enough */ 79 if (nd_table[0].used) { 80 qemu_check_nic_model(&nd_table[0], "lan9118"); 81 dev = qdev_new(TYPE_LAN9118); 82 qdev_set_nic_properties(dev, &nd_table[0]); 83 qdev_prop_set_uint32(dev, "mode_16bit", 1); 84 s = SYS_BUS_DEVICE(dev); 85 sysbus_realize_and_unref(s, &error_fatal); 86 sysbus_mmio_map(s, 0, base); 87 sysbus_connect_irq(s, 0, irq); 88 } 89 } 90 91 static void exynos4_boards_init_ram(Exynos4BoardState *s, 92 MemoryRegion *system_mem, 93 unsigned long ram_size) 94 { 95 unsigned long mem_size = ram_size; 96 97 if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { 98 memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", 99 mem_size - EXYNOS4210_DRAM_MAX_SIZE, 100 &error_fatal); 101 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, 102 &s->dram1_mem); 103 mem_size = EXYNOS4210_DRAM_MAX_SIZE; 104 } 105 106 memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, 107 &error_fatal); 108 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, 109 &s->dram0_mem); 110 } 111 112 static Exynos4BoardState * 113 exynos4_boards_init_common(MachineState *machine, 114 Exynos4BoardType board_type) 115 { 116 Exynos4BoardState *s = g_new(Exynos4BoardState, 1); 117 118 exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type]; 119 exynos4_board_binfo.board_id = exynos4_board_id[board_type]; 120 exynos4_board_binfo.smp_bootreg_addr = 121 exynos4_board_smp_bootreg_addr[board_type]; 122 exynos4_board_binfo.gic_cpu_if_addr = 123 EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; 124 125 exynos4_boards_init_ram(s, get_system_memory(), 126 exynos4_board_ram_size[board_type]); 127 128 object_initialize_child(OBJECT(machine), "soc", &s->soc, 129 TYPE_EXYNOS4210_SOC); 130 sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); 131 132 return s; 133 } 134 135 static void nuri_init(MachineState *machine) 136 { 137 exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI); 138 139 arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo); 140 } 141 142 static void smdkc210_init(MachineState *machine) 143 { 144 Exynos4BoardState *s = exynos4_boards_init_common(machine, 145 EXYNOS4_BOARD_SMDKC210); 146 147 lan9215_init(SMDK_LAN9118_BASE_ADDR, 148 qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); 149 arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo); 150 } 151 152 static void nuri_class_init(ObjectClass *oc, void *data) 153 { 154 MachineClass *mc = MACHINE_CLASS(oc); 155 156 mc->desc = "Samsung NURI board (Exynos4210)"; 157 mc->init = nuri_init; 158 mc->max_cpus = EXYNOS4210_NCPUS; 159 mc->min_cpus = EXYNOS4210_NCPUS; 160 mc->default_cpus = EXYNOS4210_NCPUS; 161 mc->ignore_memory_transaction_failures = true; 162 } 163 164 static const TypeInfo nuri_type = { 165 .name = MACHINE_TYPE_NAME("nuri"), 166 .parent = TYPE_MACHINE, 167 .class_init = nuri_class_init, 168 }; 169 170 static void smdkc210_class_init(ObjectClass *oc, void *data) 171 { 172 MachineClass *mc = MACHINE_CLASS(oc); 173 174 mc->desc = "Samsung SMDKC210 board (Exynos4210)"; 175 mc->init = smdkc210_init; 176 mc->max_cpus = EXYNOS4210_NCPUS; 177 mc->min_cpus = EXYNOS4210_NCPUS; 178 mc->default_cpus = EXYNOS4210_NCPUS; 179 mc->ignore_memory_transaction_failures = true; 180 } 181 182 static const TypeInfo smdkc210_type = { 183 .name = MACHINE_TYPE_NAME("smdkc210"), 184 .parent = TYPE_MACHINE, 185 .class_init = smdkc210_class_init, 186 }; 187 188 static void exynos4_machines_init(void) 189 { 190 type_register_static(&nuri_type); 191 type_register_static(&smdkc210_type); 192 } 193 194 type_init(exynos4_machines_init)