bcm2835_peripherals.c (16852B)
1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or later. 9 * See the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu/module.h" 15 #include "hw/arm/bcm2835_peripherals.h" 16 #include "hw/misc/bcm2835_mbox_defs.h" 17 #include "hw/arm/raspi_platform.h" 18 #include "sysemu/sysemu.h" 19 20 /* Peripheral base address on the VC (GPU) system bus */ 21 #define BCM2835_VC_PERI_BASE 0x7e000000 22 23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */ 24 #define BCM2835_SDHC_CAPAREG 0x52134b4 25 26 /* 27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ, 28 * while channels 11--14 share one IRQ: 29 */ 30 #define SEPARATE_DMA_IRQ_MAX 10 31 #define ORGATED_DMA_IRQ_COUNT 4 32 33 static void create_unimp(BCM2835PeripheralState *ps, 34 UnimplementedDeviceState *uds, 35 const char *name, hwaddr ofs, hwaddr size) 36 { 37 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE); 38 qdev_prop_set_string(DEVICE(uds), "name", name); 39 qdev_prop_set_uint64(DEVICE(uds), "size", size); 40 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); 41 memory_region_add_subregion_overlap(&ps->peri_mr, ofs, 42 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); 43 } 44 45 static void bcm2835_peripherals_init(Object *obj) 46 { 47 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj); 48 49 /* Memory region for peripheral devices, which we export to our parent */ 50 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); 51 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); 52 53 /* Internal memory region for peripheral bus addresses (not exported) */ 54 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); 55 56 /* Internal memory region for request/response communication with 57 * mailbox-addressable peripherals (not exported) 58 */ 59 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox", 60 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); 61 62 /* Interrupt Controller */ 63 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC); 64 65 /* SYS Timer */ 66 object_initialize_child(obj, "systimer", &s->systmr, 67 TYPE_BCM2835_SYSTIMER); 68 69 /* UART0 */ 70 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011); 71 72 /* AUX / UART1 */ 73 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX); 74 75 /* Mailboxes */ 76 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX); 77 78 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", 79 OBJECT(&s->mbox_mr)); 80 81 /* Framebuffer */ 82 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB); 83 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size"); 84 85 object_property_add_const_link(OBJECT(&s->fb), "dma-mr", 86 OBJECT(&s->gpu_bus_mr)); 87 88 /* Property channel */ 89 object_initialize_child(obj, "property", &s->property, 90 TYPE_BCM2835_PROPERTY); 91 object_property_add_alias(obj, "board-rev", OBJECT(&s->property), 92 "board-rev"); 93 94 object_property_add_const_link(OBJECT(&s->property), "fb", 95 OBJECT(&s->fb)); 96 object_property_add_const_link(OBJECT(&s->property), "dma-mr", 97 OBJECT(&s->gpu_bus_mr)); 98 99 /* Random Number Generator */ 100 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); 101 102 /* Extended Mass Media Controller */ 103 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI); 104 105 /* SDHOST */ 106 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST); 107 108 /* DMA Channels */ 109 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA); 110 111 object_initialize_child(obj, "orgated-dma-irq", 112 &s->orgated_dma_irq, TYPE_OR_IRQ); 113 object_property_set_int(OBJECT(&s->orgated_dma_irq), "num-lines", 114 ORGATED_DMA_IRQ_COUNT, &error_abort); 115 116 object_property_add_const_link(OBJECT(&s->dma), "dma-mr", 117 OBJECT(&s->gpu_bus_mr)); 118 119 /* Thermal */ 120 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); 121 122 /* GPIO */ 123 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); 124 125 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", 126 OBJECT(&s->sdhci.sdbus)); 127 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", 128 OBJECT(&s->sdhost.sdbus)); 129 130 /* Mphi */ 131 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI); 132 133 /* DWC2 */ 134 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB); 135 136 /* CPRMAN clock manager */ 137 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN); 138 139 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr", 140 OBJECT(&s->gpu_bus_mr)); 141 142 /* Power Management */ 143 object_initialize_child(obj, "powermgt", &s->powermgt, 144 TYPE_BCM2835_POWERMGT); 145 } 146 147 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) 148 { 149 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev); 150 Object *obj; 151 MemoryRegion *ram; 152 Error *err = NULL; 153 uint64_t ram_size, vcram_size; 154 int n; 155 156 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort); 157 158 ram = MEMORY_REGION(obj); 159 ram_size = memory_region_size(ram); 160 161 /* Map peripherals and RAM into the GPU address space. */ 162 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), 163 "bcm2835-peripherals", &s->peri_mr, 0, 164 memory_region_size(&s->peri_mr)); 165 166 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE, 167 &s->peri_mr_alias, 1); 168 169 /* RAM is aliased four times (different cache configurations) on the GPU */ 170 for (n = 0; n < 4; n++) { 171 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), 172 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size); 173 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30, 174 &s->ram_alias[n], 0); 175 } 176 177 /* Interrupt Controller */ 178 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) { 179 return; 180 } 181 182 /* CPRMAN clock manager */ 183 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) { 184 return; 185 } 186 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET, 187 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0)); 188 qdev_connect_clock_in(DEVICE(&s->uart0), "clk", 189 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out")); 190 191 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET, 192 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0)); 193 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); 194 195 /* Sys Timer */ 196 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) { 197 return; 198 } 199 memory_region_add_subregion(&s->peri_mr, ST_OFFSET, 200 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0)); 201 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0, 202 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 203 INTERRUPT_TIMER0)); 204 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1, 205 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 206 INTERRUPT_TIMER1)); 207 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2, 208 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 209 INTERRUPT_TIMER2)); 210 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3, 211 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 212 INTERRUPT_TIMER3)); 213 214 /* UART0 */ 215 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); 216 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) { 217 return; 218 } 219 220 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET, 221 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0)); 222 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0, 223 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 224 INTERRUPT_UART0)); 225 226 /* AUX / UART1 */ 227 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); 228 229 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) { 230 return; 231 } 232 233 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET, 234 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0)); 235 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0, 236 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 237 INTERRUPT_AUX)); 238 239 /* Mailboxes */ 240 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) { 241 return; 242 } 243 244 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET, 245 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0)); 246 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0, 247 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ, 248 INTERRUPT_ARM_MAILBOX)); 249 250 /* Framebuffer */ 251 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err); 252 if (err) { 253 error_propagate(errp, err); 254 return; 255 } 256 257 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", 258 ram_size - vcram_size, errp)) { 259 return; 260 } 261 262 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) { 263 return; 264 } 265 266 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT, 267 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0)); 268 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0, 269 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB)); 270 271 /* Property channel */ 272 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) { 273 return; 274 } 275 276 memory_region_add_subregion(&s->mbox_mr, 277 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT, 278 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0)); 279 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0, 280 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); 281 282 /* Random Number Generator */ 283 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) { 284 return; 285 } 286 287 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET, 288 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0)); 289 290 /* Extended Mass Media Controller 291 * 292 * Compatible with: 293 * - SD Host Controller Specification Version 3.0 Draft 1.0 294 * - SDIO Specification Version 3.0 295 * - MMC Specification Version 4.4 296 * 297 * For the exact details please refer to the Arasan documentation: 298 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf 299 */ 300 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3, 301 &error_abort); 302 object_property_set_uint(OBJECT(&s->sdhci), "capareg", 303 BCM2835_SDHC_CAPAREG, &error_abort); 304 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true, 305 &error_abort); 306 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) { 307 return; 308 } 309 310 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET, 311 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0)); 312 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, 313 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 314 INTERRUPT_ARASANSDIO)); 315 316 /* SDHOST */ 317 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) { 318 return; 319 } 320 321 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET, 322 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0)); 323 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0, 324 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 325 INTERRUPT_SDIO)); 326 327 /* DMA Channels */ 328 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) { 329 return; 330 } 331 332 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET, 333 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0)); 334 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET, 335 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1)); 336 337 for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) { 338 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n, 339 qdev_get_gpio_in_named(DEVICE(&s->ic), 340 BCM2835_IC_GPU_IRQ, 341 INTERRUPT_DMA0 + n)); 342 } 343 if (!qdev_realize(DEVICE(&s->orgated_dma_irq), NULL, errp)) { 344 return; 345 } 346 for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) { 347 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), 348 SEPARATE_DMA_IRQ_MAX + 1 + n, 349 qdev_get_gpio_in(DEVICE(&s->orgated_dma_irq), n)); 350 } 351 qdev_connect_gpio_out(DEVICE(&s->orgated_dma_irq), 0, 352 qdev_get_gpio_in_named(DEVICE(&s->ic), 353 BCM2835_IC_GPU_IRQ, 354 INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1)); 355 356 /* THERMAL */ 357 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) { 358 return; 359 } 360 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET, 361 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); 362 363 /* GPIO */ 364 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { 365 return; 366 } 367 368 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET, 369 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); 370 371 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); 372 373 /* Mphi */ 374 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) { 375 return; 376 } 377 378 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET, 379 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0)); 380 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0, 381 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 382 INTERRUPT_HOSTPORT)); 383 384 /* DWC2 */ 385 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) { 386 return; 387 } 388 389 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET, 390 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0)); 391 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0, 392 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ, 393 INTERRUPT_USB)); 394 395 /* Power Management */ 396 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) { 397 return; 398 } 399 400 memory_region_add_subregion(&s->peri_mr, PM_OFFSET, 401 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0)); 402 403 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000); 404 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40); 405 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); 406 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); 407 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20); 408 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); 409 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); 410 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); 411 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); 412 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); 413 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); 414 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); 415 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000); 416 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); 417 } 418 419 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data) 420 { 421 DeviceClass *dc = DEVICE_CLASS(oc); 422 423 dc->realize = bcm2835_peripherals_realize; 424 } 425 426 static const TypeInfo bcm2835_peripherals_type_info = { 427 .name = TYPE_BCM2835_PERIPHERALS, 428 .parent = TYPE_SYS_BUS_DEVICE, 429 .instance_size = sizeof(BCM2835PeripheralState), 430 .instance_init = bcm2835_peripherals_init, 431 .class_init = bcm2835_peripherals_class_init, 432 }; 433 434 static void bcm2835_peripherals_register_types(void) 435 { 436 type_register_static(&bcm2835_peripherals_type_info); 437 } 438 439 type_init(bcm2835_peripherals_register_types)