piix4.c (22416B)
1 /* 2 * ACPI implementation 3 * 4 * Copyright (c) 2006 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License version 2.1 as published by the Free Software Foundation. 9 * 10 * This library is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * Lesser General Public License for more details. 14 * 15 * You should have received a copy of the GNU Lesser General Public 16 * License along with this library; if not, see <http://www.gnu.org/licenses/> 17 * 18 * Contributions after 2012-01-13 are licensed under the terms of the 19 * GNU GPL, version 2 or (at your option) any later version. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/i386/pc.h" 24 #include "hw/southbridge/piix.h" 25 #include "hw/irq.h" 26 #include "hw/isa/apm.h" 27 #include "hw/i2c/pm_smbus.h" 28 #include "hw/pci/pci.h" 29 #include "hw/qdev-properties.h" 30 #include "hw/acpi/acpi.h" 31 #include "hw/acpi/pcihp.h" 32 #include "hw/acpi/piix4.h" 33 #include "sysemu/runstate.h" 34 #include "sysemu/sysemu.h" 35 #include "sysemu/xen.h" 36 #include "qapi/error.h" 37 #include "qemu/range.h" 38 #include "hw/acpi/pcihp.h" 39 #include "hw/acpi/cpu_hotplug.h" 40 #include "hw/acpi/cpu.h" 41 #include "hw/hotplug.h" 42 #include "hw/mem/pc-dimm.h" 43 #include "hw/mem/nvdimm.h" 44 #include "hw/acpi/memory_hotplug.h" 45 #include "hw/acpi/acpi_dev_interface.h" 46 #include "migration/vmstate.h" 47 #include "hw/core/cpu.h" 48 #include "trace.h" 49 #include "qom/object.h" 50 51 #define GPE_BASE 0xafe0 52 #define GPE_LEN 4 53 54 #define ACPI_PCIHP_ADDR_PIIX4 0xae00 55 56 struct pci_status { 57 uint32_t up; /* deprecated, maintained for migration compatibility */ 58 uint32_t down; 59 }; 60 61 static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, 62 PCIBus *bus, PIIX4PMState *s); 63 64 #define ACPI_ENABLE 0xf1 65 #define ACPI_DISABLE 0xf0 66 67 static void pm_tmr_timer(ACPIREGS *ar) 68 { 69 PIIX4PMState *s = container_of(ar, PIIX4PMState, ar); 70 acpi_update_sci(&s->ar, s->irq); 71 } 72 73 static void apm_ctrl_changed(uint32_t val, void *arg) 74 { 75 PIIX4PMState *s = arg; 76 PCIDevice *d = PCI_DEVICE(s); 77 78 /* ACPI specs 3.0, 4.7.2.5 */ 79 acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE); 80 if (val == ACPI_ENABLE || val == ACPI_DISABLE) { 81 return; 82 } 83 84 if (d->config[0x5b] & (1 << 1)) { 85 if (s->smi_irq) { 86 qemu_irq_raise(s->smi_irq); 87 } 88 } 89 } 90 91 static void pm_io_space_update(PIIX4PMState *s) 92 { 93 PCIDevice *d = PCI_DEVICE(s); 94 95 s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40)); 96 s->io_base &= 0xffc0; 97 98 memory_region_transaction_begin(); 99 memory_region_set_enabled(&s->io, d->config[0x80] & 1); 100 memory_region_set_address(&s->io, s->io_base); 101 memory_region_transaction_commit(); 102 } 103 104 static void smbus_io_space_update(PIIX4PMState *s) 105 { 106 PCIDevice *d = PCI_DEVICE(s); 107 108 s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90)); 109 s->smb_io_base &= 0xffc0; 110 111 memory_region_transaction_begin(); 112 memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1); 113 memory_region_set_address(&s->smb.io, s->smb_io_base); 114 memory_region_transaction_commit(); 115 } 116 117 static void pm_write_config(PCIDevice *d, 118 uint32_t address, uint32_t val, int len) 119 { 120 pci_default_write_config(d, address, val, len); 121 if (range_covers_byte(address, len, 0x80) || 122 ranges_overlap(address, len, 0x40, 4)) { 123 pm_io_space_update((PIIX4PMState *)d); 124 } 125 if (range_covers_byte(address, len, 0xd2) || 126 ranges_overlap(address, len, 0x90, 4)) { 127 smbus_io_space_update((PIIX4PMState *)d); 128 } 129 } 130 131 static int vmstate_acpi_post_load(void *opaque, int version_id) 132 { 133 PIIX4PMState *s = opaque; 134 135 pm_io_space_update(s); 136 smbus_io_space_update(s); 137 return 0; 138 } 139 140 #define VMSTATE_GPE_ARRAY(_field, _state) \ 141 { \ 142 .name = (stringify(_field)), \ 143 .version_id = 0, \ 144 .info = &vmstate_info_uint16, \ 145 .size = sizeof(uint16_t), \ 146 .flags = VMS_SINGLE | VMS_POINTER, \ 147 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ 148 } 149 150 static const VMStateDescription vmstate_gpe = { 151 .name = "gpe", 152 .version_id = 1, 153 .minimum_version_id = 1, 154 .fields = (VMStateField[]) { 155 VMSTATE_GPE_ARRAY(sts, ACPIGPE), 156 VMSTATE_GPE_ARRAY(en, ACPIGPE), 157 VMSTATE_END_OF_LIST() 158 } 159 }; 160 161 static const VMStateDescription vmstate_pci_status = { 162 .name = "pci_status", 163 .version_id = 1, 164 .minimum_version_id = 1, 165 .fields = (VMStateField[]) { 166 VMSTATE_UINT32(up, struct AcpiPciHpPciStatus), 167 VMSTATE_UINT32(down, struct AcpiPciHpPciStatus), 168 VMSTATE_END_OF_LIST() 169 } 170 }; 171 172 static bool vmstate_test_use_acpi_hotplug_bridge(void *opaque, int version_id) 173 { 174 PIIX4PMState *s = opaque; 175 return s->use_acpi_hotplug_bridge; 176 } 177 178 static bool vmstate_test_no_use_acpi_hotplug_bridge(void *opaque, 179 int version_id) 180 { 181 PIIX4PMState *s = opaque; 182 return !s->use_acpi_hotplug_bridge; 183 } 184 185 static bool vmstate_test_use_memhp(void *opaque) 186 { 187 PIIX4PMState *s = opaque; 188 return s->acpi_memory_hotplug.is_enabled; 189 } 190 191 static const VMStateDescription vmstate_memhp_state = { 192 .name = "piix4_pm/memhp", 193 .version_id = 1, 194 .minimum_version_id = 1, 195 .needed = vmstate_test_use_memhp, 196 .fields = (VMStateField[]) { 197 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, PIIX4PMState), 198 VMSTATE_END_OF_LIST() 199 } 200 }; 201 202 static bool vmstate_test_use_cpuhp(void *opaque) 203 { 204 PIIX4PMState *s = opaque; 205 return !s->cpu_hotplug_legacy; 206 } 207 208 static int vmstate_cpuhp_pre_load(void *opaque) 209 { 210 Object *obj = OBJECT(opaque); 211 object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort); 212 return 0; 213 } 214 215 static const VMStateDescription vmstate_cpuhp_state = { 216 .name = "piix4_pm/cpuhp", 217 .version_id = 1, 218 .minimum_version_id = 1, 219 .needed = vmstate_test_use_cpuhp, 220 .pre_load = vmstate_cpuhp_pre_load, 221 .fields = (VMStateField[]) { 222 VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState), 223 VMSTATE_END_OF_LIST() 224 } 225 }; 226 227 static bool piix4_vmstate_need_smbus(void *opaque, int version_id) 228 { 229 return pm_smbus_vmstate_needed(); 230 } 231 232 /* 233 * This is a fudge to turn off the acpi_index field, 234 * whose test was always broken on piix4 with 6.2 and older machine types. 235 */ 236 static bool vmstate_test_migrate_acpi_index(void *opaque, int version_id) 237 { 238 PIIX4PMState *s = PIIX4_PM(opaque); 239 return s->use_acpi_hotplug_bridge && !s->not_migrate_acpi_index; 240 } 241 242 /* qemu-kvm 1.2 uses version 3 but advertised as 2 243 * To support incoming qemu-kvm 1.2 migration, change version_id 244 * and minimum_version_id to 2 below (which breaks migration from 245 * qemu 1.2). 246 * 247 */ 248 static const VMStateDescription vmstate_acpi = { 249 .name = "piix4_pm", 250 .version_id = 3, 251 .minimum_version_id = 3, 252 .post_load = vmstate_acpi_post_load, 253 .fields = (VMStateField[]) { 254 VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState), 255 VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState), 256 VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState), 257 VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState), 258 VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState), 259 VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3, 260 pmsmb_vmstate, PMSMBus), 261 VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState), 262 VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState), 263 VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE), 264 VMSTATE_STRUCT_TEST( 265 acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], 266 PIIX4PMState, 267 vmstate_test_no_use_acpi_hotplug_bridge, 268 2, vmstate_pci_status, 269 struct AcpiPciHpPciStatus), 270 VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug, PIIX4PMState, 271 vmstate_test_use_acpi_hotplug_bridge, 272 vmstate_test_migrate_acpi_index), 273 VMSTATE_END_OF_LIST() 274 }, 275 .subsections = (const VMStateDescription*[]) { 276 &vmstate_memhp_state, 277 &vmstate_cpuhp_state, 278 NULL 279 } 280 }; 281 282 static void piix4_pm_reset(DeviceState *dev) 283 { 284 PIIX4PMState *s = PIIX4_PM(dev); 285 PCIDevice *d = PCI_DEVICE(s); 286 uint8_t *pci_conf = d->config; 287 288 pci_conf[0x58] = 0; 289 pci_conf[0x59] = 0; 290 pci_conf[0x5a] = 0; 291 pci_conf[0x5b] = 0; 292 293 pci_conf[0x40] = 0x01; /* PM io base read only bit */ 294 pci_conf[0x80] = 0; 295 296 if (!s->smm_enabled) { 297 /* Mark SMM as already inited (until KVM supports SMM). */ 298 pci_conf[0x5B] = 0x02; 299 } 300 301 acpi_pm1_evt_reset(&s->ar); 302 acpi_pm1_cnt_reset(&s->ar); 303 acpi_pm_tmr_reset(&s->ar); 304 acpi_gpe_reset(&s->ar); 305 acpi_update_sci(&s->ar, s->irq); 306 307 pm_io_space_update(s); 308 acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug); 309 } 310 311 static void piix4_pm_powerdown_req(Notifier *n, void *opaque) 312 { 313 PIIX4PMState *s = container_of(n, PIIX4PMState, powerdown_notifier); 314 315 assert(s != NULL); 316 acpi_pm1_evt_power_down(&s->ar); 317 } 318 319 static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev, 320 DeviceState *dev, Error **errp) 321 { 322 PIIX4PMState *s = PIIX4_PM(hotplug_dev); 323 324 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 325 acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); 326 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 327 if (!s->acpi_memory_hotplug.is_enabled) { 328 error_setg(errp, 329 "memory hotplug is not enabled: %s.memory-hotplug-support " 330 "is not set", object_get_typename(OBJECT(s))); 331 } 332 } else if ( 333 !object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 334 error_setg(errp, "acpi: device pre plug request for not supported" 335 " device type: %s", object_get_typename(OBJECT(dev))); 336 } 337 } 338 339 static void piix4_device_plug_cb(HotplugHandler *hotplug_dev, 340 DeviceState *dev, Error **errp) 341 { 342 PIIX4PMState *s = PIIX4_PM(hotplug_dev); 343 344 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 345 if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { 346 nvdimm_acpi_plug_cb(hotplug_dev, dev); 347 } else { 348 acpi_memory_plug_cb(hotplug_dev, &s->acpi_memory_hotplug, 349 dev, errp); 350 } 351 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 352 acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp); 353 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { 354 if (s->cpu_hotplug_legacy) { 355 legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp); 356 } else { 357 acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); 358 } 359 } else { 360 g_assert_not_reached(); 361 } 362 } 363 364 static void piix4_device_unplug_request_cb(HotplugHandler *hotplug_dev, 365 DeviceState *dev, Error **errp) 366 { 367 PIIX4PMState *s = PIIX4_PM(hotplug_dev); 368 369 if (s->acpi_memory_hotplug.is_enabled && 370 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 371 acpi_memory_unplug_request_cb(hotplug_dev, &s->acpi_memory_hotplug, 372 dev, errp); 373 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 374 acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotplug, 375 dev, errp); 376 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && 377 !s->cpu_hotplug_legacy) { 378 acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp); 379 } else { 380 error_setg(errp, "acpi: device unplug request for not supported device" 381 " type: %s", object_get_typename(OBJECT(dev))); 382 } 383 } 384 385 static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev, 386 DeviceState *dev, Error **errp) 387 { 388 PIIX4PMState *s = PIIX4_PM(hotplug_dev); 389 390 if (s->acpi_memory_hotplug.is_enabled && 391 object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 392 acpi_memory_unplug_cb(&s->acpi_memory_hotplug, dev, errp); 393 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 394 acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, 395 errp); 396 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && 397 !s->cpu_hotplug_legacy) { 398 acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); 399 } else { 400 error_setg(errp, "acpi: device unplug for not supported device" 401 " type: %s", object_get_typename(OBJECT(dev))); 402 } 403 } 404 405 static void piix4_pm_machine_ready(Notifier *n, void *opaque) 406 { 407 PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready); 408 PCIDevice *d = PCI_DEVICE(s); 409 MemoryRegion *io_as = pci_address_space_io(d); 410 uint8_t *pci_conf; 411 412 pci_conf = d->config; 413 pci_conf[0x5f] = 0x10 | 414 (memory_region_present(io_as, 0x378) ? 0x80 : 0); 415 pci_conf[0x63] = 0x60; 416 pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) | 417 (memory_region_present(io_as, 0x2f8) ? 0x90 : 0); 418 } 419 420 static void piix4_pm_add_properties(PIIX4PMState *s) 421 { 422 static const uint8_t acpi_enable_cmd = ACPI_ENABLE; 423 static const uint8_t acpi_disable_cmd = ACPI_DISABLE; 424 static const uint32_t gpe0_blk = GPE_BASE; 425 static const uint32_t gpe0_blk_len = GPE_LEN; 426 static const uint16_t sci_int = 9; 427 428 object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD, 429 &acpi_enable_cmd, OBJ_PROP_FLAG_READ); 430 object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD, 431 &acpi_disable_cmd, OBJ_PROP_FLAG_READ); 432 object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK, 433 &gpe0_blk, OBJ_PROP_FLAG_READ); 434 object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN, 435 &gpe0_blk_len, OBJ_PROP_FLAG_READ); 436 object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT, 437 &sci_int, OBJ_PROP_FLAG_READ); 438 object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE, 439 &s->io_base, OBJ_PROP_FLAG_READ); 440 } 441 442 static void piix4_pm_realize(PCIDevice *dev, Error **errp) 443 { 444 PIIX4PMState *s = PIIX4_PM(dev); 445 uint8_t *pci_conf; 446 447 pci_conf = dev->config; 448 pci_conf[0x06] = 0x80; 449 pci_conf[0x07] = 0x02; 450 pci_conf[0x09] = 0x00; 451 pci_conf[0x3d] = 0x01; // interrupt pin 1 452 453 /* APM */ 454 apm_init(dev, &s->apm, apm_ctrl_changed, s); 455 456 if (!s->smm_enabled) { 457 /* Mark SMM as already inited to prevent SMM from running. KVM does not 458 * support SMM mode. */ 459 pci_conf[0x5B] = 0x02; 460 } 461 462 /* XXX: which specification is used ? The i82731AB has different 463 mappings */ 464 pci_conf[0x90] = s->smb_io_base | 1; 465 pci_conf[0x91] = s->smb_io_base >> 8; 466 pci_conf[0xd2] = 0x09; 467 pm_smbus_init(DEVICE(dev), &s->smb, true); 468 memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); 469 memory_region_add_subregion(pci_address_space_io(dev), 470 s->smb_io_base, &s->smb.io); 471 472 memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64); 473 memory_region_set_enabled(&s->io, false); 474 memory_region_add_subregion(pci_address_space_io(dev), 475 0, &s->io); 476 477 acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); 478 acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); 479 acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_val, 480 !s->smm_compat && !s->smm_enabled); 481 acpi_gpe_init(&s->ar, GPE_LEN); 482 483 s->powerdown_notifier.notify = piix4_pm_powerdown_req; 484 qemu_register_powerdown_notifier(&s->powerdown_notifier); 485 486 s->machine_ready.notify = piix4_pm_machine_ready; 487 qemu_add_machine_init_done_notifier(&s->machine_ready); 488 489 if (xen_enabled()) { 490 s->use_acpi_hotplug_bridge = false; 491 } 492 493 piix4_acpi_system_hot_add_init(pci_address_space_io(dev), 494 pci_get_bus(dev), s); 495 qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s)); 496 497 piix4_pm_add_properties(s); 498 } 499 500 static void piix4_pm_init(Object *obj) 501 { 502 PIIX4PMState *s = PIIX4_PM(obj); 503 504 qdev_init_gpio_out(DEVICE(obj), &s->irq, 1); 505 qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1); 506 } 507 508 static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) 509 { 510 PIIX4PMState *s = opaque; 511 uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); 512 513 trace_piix4_gpe_readb(addr, width, val); 514 return val; 515 } 516 517 static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, 518 unsigned width) 519 { 520 PIIX4PMState *s = opaque; 521 522 trace_piix4_gpe_writeb(addr, width, val); 523 acpi_gpe_ioport_writeb(&s->ar, addr, val); 524 acpi_update_sci(&s->ar, s->irq); 525 } 526 527 static const MemoryRegionOps piix4_gpe_ops = { 528 .read = gpe_readb, 529 .write = gpe_writeb, 530 .valid.min_access_size = 1, 531 .valid.max_access_size = 4, 532 .impl.min_access_size = 1, 533 .impl.max_access_size = 1, 534 .endianness = DEVICE_LITTLE_ENDIAN, 535 }; 536 537 538 static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp) 539 { 540 PIIX4PMState *s = PIIX4_PM(obj); 541 542 return s->cpu_hotplug_legacy; 543 } 544 545 static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **errp) 546 { 547 PIIX4PMState *s = PIIX4_PM(obj); 548 549 assert(!value); 550 if (s->cpu_hotplug_legacy && value == false) { 551 acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state, 552 PIIX4_CPU_HOTPLUG_IO_BASE); 553 } 554 s->cpu_hotplug_legacy = value; 555 } 556 557 static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, 558 PCIBus *bus, PIIX4PMState *s) 559 { 560 memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s, 561 "acpi-gpe0", GPE_LEN); 562 memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe); 563 564 if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { 565 acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent, 566 s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4); 567 } 568 569 s->cpu_hotplug_legacy = true; 570 object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy", 571 piix4_get_cpu_hotplug_legacy, 572 piix4_set_cpu_hotplug_legacy); 573 legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu, 574 PIIX4_CPU_HOTPLUG_IO_BASE); 575 576 if (s->acpi_memory_hotplug.is_enabled) { 577 acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug, 578 ACPI_MEMORY_HOTPLUG_BASE); 579 } 580 } 581 582 static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) 583 { 584 PIIX4PMState *s = PIIX4_PM(adev); 585 586 acpi_memory_ospm_status(&s->acpi_memory_hotplug, list); 587 if (!s->cpu_hotplug_legacy) { 588 acpi_cpu_ospm_status(&s->cpuhp_state, list); 589 } 590 } 591 592 static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) 593 { 594 PIIX4PMState *s = PIIX4_PM(adev); 595 596 acpi_send_gpe_event(&s->ar, s->irq, ev); 597 } 598 599 static Property piix4_pm_properties[] = { 600 DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), 601 DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0), 602 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0), 603 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2), 604 DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, PIIX4PMState, 605 use_acpi_hotplug_bridge, true), 606 DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCI_ROOTHP, PIIX4PMState, 607 use_acpi_root_pci_hotplug, true), 608 DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState, 609 acpi_memory_hotplug.is_enabled, true), 610 DEFINE_PROP_BOOL("smm-compat", PIIX4PMState, smm_compat, false), 611 DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false), 612 DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState, 613 not_migrate_acpi_index, false), 614 DEFINE_PROP_END_OF_LIST(), 615 }; 616 617 static void piix4_pm_class_init(ObjectClass *klass, void *data) 618 { 619 DeviceClass *dc = DEVICE_CLASS(klass); 620 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 621 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 622 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass); 623 624 k->realize = piix4_pm_realize; 625 k->config_write = pm_write_config; 626 k->vendor_id = PCI_VENDOR_ID_INTEL; 627 k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3; 628 k->revision = 0x03; 629 k->class_id = PCI_CLASS_BRIDGE_OTHER; 630 dc->reset = piix4_pm_reset; 631 dc->desc = "PM"; 632 dc->vmsd = &vmstate_acpi; 633 device_class_set_props(dc, piix4_pm_properties); 634 /* 635 * Reason: part of PIIX4 southbridge, needs to be wired up, 636 * e.g. by mips_malta_init() 637 */ 638 dc->user_creatable = false; 639 dc->hotpluggable = false; 640 hc->pre_plug = piix4_device_pre_plug_cb; 641 hc->plug = piix4_device_plug_cb; 642 hc->unplug_request = piix4_device_unplug_request_cb; 643 hc->unplug = piix4_device_unplug_cb; 644 adevc->ospm_status = piix4_ospm_status; 645 adevc->send_event = piix4_send_gpe; 646 adevc->madt_cpu = pc_madt_cpu_entry; 647 } 648 649 static const TypeInfo piix4_pm_info = { 650 .name = TYPE_PIIX4_PM, 651 .parent = TYPE_PCI_DEVICE, 652 .instance_init = piix4_pm_init, 653 .instance_size = sizeof(PIIX4PMState), 654 .class_init = piix4_pm_class_init, 655 .interfaces = (InterfaceInfo[]) { 656 { TYPE_HOTPLUG_HANDLER }, 657 { TYPE_ACPI_DEVICE_IF }, 658 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 659 { } 660 } 661 }; 662 663 static void piix4_pm_register_types(void) 664 { 665 type_register_static(&piix4_pm_info); 666 } 667 668 type_init(piix4_pm_register_types)