ljx

FORK: LuaJIT with native 5.2 and 5.3 support
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lj_emit_mips.h (6260B)

      1 /*
      2 ** MIPS instruction emitter.
      3 ** Copyright (C) 2005-2016 Mike Pall. See Copyright Notice in luajit.h
      4 */
      5 
      6 /* -- Emit basic instructions --------------------------------------------- */
      7 
      8 static void emit_dst(ASMState *as, MIPSIns mi, Reg rd, Reg rs, Reg rt)
      9 {
     10   *--as->mcp = mi | MIPSF_D(rd) | MIPSF_S(rs) | MIPSF_T(rt);
     11 }
     12 
     13 static void emit_dta(ASMState *as, MIPSIns mi, Reg rd, Reg rt, uint32_t a)
     14 {
     15   *--as->mcp = mi | MIPSF_D(rd) | MIPSF_T(rt) | MIPSF_A(a);
     16 }
     17 
     18 #define emit_ds(as, mi, rd, rs)		emit_dst(as, (mi), (rd), (rs), 0)
     19 #define emit_tg(as, mi, rt, rg)		emit_dst(as, (mi), (rg)&31, 0, (rt))
     20 
     21 static void emit_tsi(ASMState *as, MIPSIns mi, Reg rt, Reg rs, int32_t i)
     22 {
     23   *--as->mcp = mi | MIPSF_T(rt) | MIPSF_S(rs) | (i & 0xffff);
     24 }
     25 
     26 #define emit_ti(as, mi, rt, i)		emit_tsi(as, (mi), (rt), 0, (i))
     27 #define emit_hsi(as, mi, rh, rs, i)	emit_tsi(as, (mi), (rh) & 31, (rs), (i))
     28 
     29 static void emit_fgh(ASMState *as, MIPSIns mi, Reg rf, Reg rg, Reg rh)
     30 {
     31   *--as->mcp = mi | MIPSF_F(rf&31) | MIPSF_G(rg&31) | MIPSF_H(rh&31);
     32 }
     33 
     34 #define emit_fg(as, mi, rf, rg)		emit_fgh(as, (mi), (rf), (rg), 0)
     35 
     36 static void emit_rotr(ASMState *as, Reg dest, Reg src, Reg tmp, uint32_t shift)
     37 {
     38   if ((as->flags & JIT_F_MIPSXXR2)) {
     39     emit_dta(as, MIPSI_ROTR, dest, src, shift);
     40   } else {
     41     emit_dst(as, MIPSI_OR, dest, dest, tmp);
     42     emit_dta(as, MIPSI_SLL, dest, src, (-shift)&31);
     43     emit_dta(as, MIPSI_SRL, tmp, src, shift);
     44   }
     45 }
     46 
     47 /* -- Emit loads/stores --------------------------------------------------- */
     48 
     49 /* Prefer rematerialization of BASE/L from global_State over spills. */
     50 #define emit_canremat(ref)	((ref) <= REF_BASE)
     51 
     52 /* Try to find a one step delta relative to another constant. */
     53 static int emit_kdelta1(ASMState *as, Reg t, int32_t i)
     54 {
     55   RegSet work = ~as->freeset & RSET_GPR;
     56   while (work) {
     57     Reg r = rset_picktop(work);
     58     IRRef ref = regcost_ref(as->cost[r]);
     59     lua_assert(r != t);
     60     if (ref < ASMREF_L) {
     61       int32_t delta = i - (ra_iskref(ref) ? ra_krefk(as, ref) : IR(ref)->i);
     62       if (checki16(delta)) {
     63 	emit_tsi(as, MIPSI_ADDIU, t, r, delta);
     64 	return 1;
     65       }
     66     }
     67     rset_clear(work, r);
     68   }
     69   return 0;  /* Failed. */
     70 }
     71 
     72 /* Load a 32 bit constant into a GPR. */
     73 static void emit_loadi(ASMState *as, Reg r, int32_t i)
     74 {
     75   if (checki16(i)) {
     76     emit_ti(as, MIPSI_LI, r, i);
     77   } else {
     78     if ((i & 0xffff)) {
     79       int32_t jgl = i32ptr(J2G(as->J));
     80       if ((uint32_t)(i-jgl) < 65536) {
     81 	emit_tsi(as, MIPSI_ADDIU, r, RID_JGL, i-jgl-32768);
     82 	return;
     83       } else if (emit_kdelta1(as, r, i)) {
     84 	return;
     85       } else if ((i >> 16) == 0) {
     86 	emit_tsi(as, MIPSI_ORI, r, RID_ZERO, i);
     87 	return;
     88       }
     89       emit_tsi(as, MIPSI_ORI, r, r, i);
     90     }
     91     emit_ti(as, MIPSI_LUI, r, (i >> 16));
     92   }
     93 }
     94 
     95 #define emit_loada(as, r, addr)		emit_loadi(as, (r), i32ptr((addr)))
     96 
     97 static Reg ra_allock(ASMState *as, int32_t k, RegSet allow);
     98 static void ra_allockreg(ASMState *as, int32_t k, Reg r);
     99 
    100 /* Get/set from constant pointer. */
    101 static void emit_lsptr(ASMState *as, MIPSIns mi, Reg r, void *p, RegSet allow)
    102 {
    103   int32_t jgl = i32ptr(J2G(as->J));
    104   int32_t i = i32ptr(p);
    105   Reg base;
    106   if ((uint32_t)(i-jgl) < 65536) {
    107     i = i-jgl-32768;
    108     base = RID_JGL;
    109   } else {
    110     base = ra_allock(as, i-(int16_t)i, allow);
    111   }
    112   emit_tsi(as, mi, r, base, i);
    113 }
    114 
    115 #define emit_loadk64(as, r, ir) \
    116   emit_lsptr(as, MIPSI_LDC1, ((r) & 31), (void *)&ir_knum((ir))->u64, RSET_GPR)
    117 
    118 /* Get/set global_State fields. */
    119 static void emit_lsglptr(ASMState *as, MIPSIns mi, Reg r, int32_t ofs)
    120 {
    121   emit_tsi(as, mi, r, RID_JGL, ofs-32768);
    122 }
    123 
    124 #define emit_getgl(as, r, field) \
    125   emit_lsglptr(as, MIPSI_LW, (r), (int32_t)offsetof(global_State, field))
    126 #define emit_setgl(as, r, field) \
    127   emit_lsglptr(as, MIPSI_SW, (r), (int32_t)offsetof(global_State, field))
    128 
    129 /* Trace number is determined from per-trace exit stubs. */
    130 #define emit_setvmstate(as, i)		UNUSED(i)
    131 
    132 /* -- Emit control-flow instructions -------------------------------------- */
    133 
    134 /* Label for internal jumps. */
    135 typedef MCode *MCLabel;
    136 
    137 /* Return label pointing to current PC. */
    138 #define emit_label(as)		((as)->mcp)
    139 
    140 static void emit_branch(ASMState *as, MIPSIns mi, Reg rs, Reg rt, MCode *target)
    141 {
    142   MCode *p = as->mcp;
    143   ptrdiff_t delta = target - p;
    144   lua_assert(((delta + 0x8000) >> 16) == 0);
    145   *--p = mi | MIPSF_S(rs) | MIPSF_T(rt) | ((uint32_t)delta & 0xffffu);
    146   as->mcp = p;
    147 }
    148 
    149 static void emit_jmp(ASMState *as, MCode *target)
    150 {
    151   *--as->mcp = MIPSI_NOP;
    152   emit_branch(as, MIPSI_B, RID_ZERO, RID_ZERO, (target));
    153 }
    154 
    155 static void emit_call(ASMState *as, void *target, int needcfa)
    156 {
    157   MCode *p = as->mcp;
    158   *--p = MIPSI_NOP;
    159   if ((((uintptr_t)target ^ (uintptr_t)p) >> 28) == 0) {
    160     *--p = (((uintptr_t)target & 1) ? MIPSI_JALX : MIPSI_JAL) |
    161 	   (((uintptr_t)target >>2) & 0x03ffffffu);
    162   } else {  /* Target out of range: need indirect call. */
    163     *--p = MIPSI_JALR | MIPSF_S(RID_CFUNCADDR);
    164     needcfa = 1;
    165   }
    166   as->mcp = p;
    167   if (needcfa) ra_allockreg(as, i32ptr(target), RID_CFUNCADDR);
    168 }
    169 
    170 /* -- Emit generic operations --------------------------------------------- */
    171 
    172 #define emit_move(as, dst, src) \
    173   emit_ds(as, MIPSI_MOVE, (dst), (src))
    174 
    175 /* Generic move between two regs. */
    176 static void emit_movrr(ASMState *as, IRIns *ir, Reg dst, Reg src)
    177 {
    178   if (dst < RID_MAX_GPR)
    179     emit_move(as, dst, src);
    180   else
    181     emit_fg(as, irt_isnum(ir->t) ? MIPSI_MOV_D : MIPSI_MOV_S, dst, src);
    182 }
    183 
    184 /* Generic load of register with base and (small) offset address. */
    185 static void emit_loadofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
    186 {
    187   if (r < RID_MAX_GPR)
    188     emit_tsi(as, MIPSI_LW, r, base, ofs);
    189   else
    190     emit_tsi(as, irt_isnum(ir->t) ? MIPSI_LDC1 : MIPSI_LWC1,
    191 	     (r & 31), base, ofs);
    192 }
    193 
    194 /* Generic store of register with base and (small) offset address. */
    195 static void emit_storeofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
    196 {
    197   if (r < RID_MAX_GPR)
    198     emit_tsi(as, MIPSI_SW, r, base, ofs);
    199   else
    200     emit_tsi(as, irt_isnum(ir->t) ? MIPSI_SDC1 : MIPSI_SWC1,
    201 	     (r&31), base, ofs);
    202 }
    203 
    204 /* Add offset to pointer. */
    205 static void emit_addptr(ASMState *as, Reg r, int32_t ofs)
    206 {
    207   if (ofs) {
    208     lua_assert(checki16(ofs));
    209     emit_tsi(as, MIPSI_ADDIU, r, r, ofs);
    210   }
    211 }
    212 
    213 #define emit_spsub(as, ofs)	emit_addptr(as, RID_SP, -(ofs))
    214