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74 lines
1.3 KiB
ArmAsm
74 lines
1.3 KiB
ArmAsm
.option norvc
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.text
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.global _start
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_start:
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# Set up vectored interrupts
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lla t0, trap
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add t0, t0, 1
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csrw mtvec, t0
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# Enable sw interrupts
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csrrsi zero, mie, 0x8
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csrrsi zero, mstatus, 0x8
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# Engage the double trap: we trigger an machine-level software
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# interrupt, which will trap to an illegal instruction
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lui t1, 0x02000
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li t0, 1
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sw t0, 0(t1)
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# If we still not went out via the software interrupt route after a
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# short while, we failed the test.
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lui t0, 0x1
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0:
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addi t0, t0, -1
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bnez t0, 0b
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j fail
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trap:
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j illegal_insn # Exceptions
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j fail # Supervisor software interrupt
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j fail
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.insn i CUSTOM_0, 0, x0, x0, 0 # Machine software interrupt
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j fail
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j fail # Supervisor timer interrupt
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j fail
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j fail # Machine timer interrupt
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j fail
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j fail # Supervisor external interrupt
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j fail
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j fail # Machine external interrupt
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j fail
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j fail # Counter overflow interrupt
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j fail
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j fail
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illegal_insn:
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# Check whether we really got an illegal instruction
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csrr t0, mcause
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li t1, 2
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bne t0, t1, fail
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li a0, 0
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j _exit
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fail:
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li a0, 1
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_exit:
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lla a1, semiargs
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li t0, 0x20026 # ADP_Stopped_ApplicationExit
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sd t0, 0(a1)
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sd a0, 8(a1)
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li a0, 0x20 # TARGET_SYS_EXIT_EXTENDED
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# Semihosting call sequence
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.balign 16
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slli zero, zero, 0x1f
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ebreak
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srai zero, zero, 0x7
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j .
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.data
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.balign 16
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semiargs:
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.space 16
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