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664 lines
25 KiB
C
664 lines
25 KiB
C
/*
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* QTest testcases for TPM TIS on I2C (derived from TPM TIS test)
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*
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* Copyright (c) 2023 IBM Corporation
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* Copyright (c) 2023 Red Hat, Inc.
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*
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* Authors:
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* Stefan Berger <stefanb@linux.ibm.com>
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* Marc-André Lureau <marcandre.lureau@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include <glib/gstdio.h>
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#include "libqtest-single.h"
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#include "hw/acpi/tpm.h"
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#include "hw/pci/pci_ids.h"
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#include "qtest_aspeed.h"
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#include "tpm-emu.h"
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#define DEBUG_TIS_TEST 0
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#define DPRINTF(fmt, ...) do { \
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if (DEBUG_TIS_TEST) { \
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printf(fmt, ## __VA_ARGS__); \
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} \
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} while (0)
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#define DPRINTF_ACCESS \
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DPRINTF("%s: %d: locty=%d l=%d access=0x%02x pending_request_flag=0x%x\n", \
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__func__, __LINE__, locty, l, access, pending_request_flag)
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#define DPRINTF_STS \
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DPRINTF("%s: %d: sts = 0x%08x\n", __func__, __LINE__, sts)
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#define I2C_SLAVE_ADDR 0x2e
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#define I2C_DEV_BUS_NUM 10
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static const uint8_t TPM_CMD[12] =
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"\x80\x01\x00\x00\x00\x0c\x00\x00\x01\x44\x00\x00";
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static uint32_t aspeed_bus_addr;
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static uint8_t cur_locty = 0xff;
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static void tpm_tis_i2c_set_locty(uint8_t locty)
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{
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if (cur_locty != locty) {
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cur_locty = locty;
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aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,
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TPM_I2C_REG_LOC_SEL, locty);
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}
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}
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static uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg)
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{
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tpm_tis_i2c_set_locty(locty);
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return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
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}
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static uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg)
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{
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tpm_tis_i2c_set_locty(locty);
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return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
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}
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static uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg)
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{
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tpm_tis_i2c_set_locty(locty);
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return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);
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}
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static void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v)
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{
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if (reg != TPM_I2C_REG_LOC_SEL) {
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tpm_tis_i2c_set_locty(locty);
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}
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aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);
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}
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static void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v)
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{
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if (reg != TPM_I2C_REG_LOC_SEL) {
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tpm_tis_i2c_set_locty(locty);
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}
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aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);
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}
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static void tpm_tis_i2c_test_basic(const void *data)
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{
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uint8_t access;
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uint32_t v, v2;
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/*
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* All register accesses below must work without locality 0 being the
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* active locality. Therefore, ensure access is released.
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*/
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_ACTIVE_LOCALITY);
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access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* read interrupt capability -- none are supported */
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v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY);
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g_assert_cmpint(v, ==, 0);
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/* try to enable all interrupts */
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tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);
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v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE);
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/* none could be enabled */
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g_assert_cmpint(v, ==, 0);
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/* enable csum */
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);
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/* check csum enable register has bit 0 set */
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v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
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g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
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/* reading it as 32bit register returns same result */
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v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
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g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
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/* disable csum */
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);
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/* check csum enable register has bit 0 clear */
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v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
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g_assert_cmpint(v, ==, 0);
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/* write to unsupported register '1' */
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tpm_tis_i2c_writel(0, 1, 0x12345678);
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v = tpm_tis_i2c_readl(0, 1);
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g_assert_cmpint(v, ==, 0xffffffff);
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/* request use of locality */
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
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/* read byte from STS + 3 */
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v = tpm_tis_i2c_readb(0, TPM_I2C_REG_STS + 3);
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g_assert_cmpint(v, ==, 0);
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/* check STS after writing to STS + 3 */
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v = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS + 3, 0xf);
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v2 = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
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g_assert_cmpint(v, ==, v2);
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/* release access */
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_ACTIVE_LOCALITY);
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/* select locality 5 -- must not be possible */
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tpm_tis_i2c_writeb(0, TPM_I2C_REG_LOC_SEL, 5);
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v = tpm_tis_i2c_readb(0, TPM_I2C_REG_LOC_SEL);
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g_assert_cmpint(v, ==, 0);
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}
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static void tpm_tis_i2c_test_check_localities(const void *data)
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{
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uint8_t locty, l;
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uint8_t access;
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uint32_t capability, i2c_cap;
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uint32_t didvid;
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uint32_t rid;
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for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) {
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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capability = tpm_tis_i2c_readl(locty, TPM_I2C_REG_INTF_CAPABILITY);
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i2c_cap = (TPM_I2C_CAP_INTERFACE_TYPE |
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TPM_I2C_CAP_INTERFACE_VER |
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TPM_I2C_CAP_TPM2_FAMILY |
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TPM_I2C_CAP_LOCALITY_CAP |
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TPM_I2C_CAP_BUS_SPEED |
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TPM_I2C_CAP_DEV_ADDR_CHANGE);
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g_assert_cmpint(capability, ==, i2c_cap);
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didvid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_DID_VID);
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g_assert_cmpint(didvid, ==, (1 << 16) | PCI_VENDOR_ID_IBM);
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rid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_RID);
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g_assert_cmpint(rid, !=, 0);
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g_assert_cmpint(rid, !=, 0xffffffff);
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/* locality selection must be at locty */
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l = tpm_tis_i2c_readb(locty, TPM_I2C_REG_LOC_SEL);
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g_assert_cmpint(l, ==, locty);
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}
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}
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static void tpm_tis_i2c_test_check_access_reg(const void *data)
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{
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uint8_t locty;
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uint8_t access;
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/* do not test locality 4 (hw only) */
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for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* request use of locality */
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tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_REQUEST_USE);
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* release access */
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tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_ACTIVE_LOCALITY);
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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}
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}
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/*
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* Test case for seizing access by a higher number locality
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*/
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static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)
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{
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int locty, l;
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uint8_t access;
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uint8_t pending_request_flag;
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/* do not test locality 4 (hw only) */
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for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {
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pending_request_flag = 0;
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* request use of locality */
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tpm_tis_i2c_writeb(locty,
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TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* lower localities cannot seize access */
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for (l = 0; l < locty; l++) {
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/* lower locality is not active */
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* try to request use from 'l' */
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tpm_tis_i2c_writeb(l,
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TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_REQUEST_USE);
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/*
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* requesting use from 'l' was not possible;
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* we must see REQUEST_USE and possibly PENDING_REQUEST
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*/
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_REQUEST_USE |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/*
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* locality 'locty' must be unchanged;
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* we must see PENDING_REQUEST
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*/
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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TPM_TIS_ACCESS_PENDING_REQUEST |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* try to seize from 'l' */
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tpm_tis_i2c_writeb(l,
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TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);
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/* seize from 'l' was not possible */
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_REQUEST_USE |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* locality 'locty' must be unchanged */
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access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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TPM_TIS_ACCESS_PENDING_REQUEST |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/*
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* on the next loop we will have a PENDING_REQUEST flag
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* set for locality 'l'
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*/
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pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;
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}
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/*
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* higher localities can 'seize' access but not 'request use';
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* note: this will activate first l+1, then l+2 etc.
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*/
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for (l = locty + 1; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
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/* try to 'request use' from 'l' */
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tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_REQUEST_USE);
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/*
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* requesting use from 'l' was not possible; we should see
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* REQUEST_USE and may see PENDING_REQUEST
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*/
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_REQUEST_USE |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/*
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* locality 'l-1' must be unchanged; we should always
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* see PENDING_REQUEST from 'l' requesting access
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*/
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access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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TPM_TIS_ACCESS_PENDING_REQUEST |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* try to seize from 'l' */
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tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);
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/* seize from 'l' was possible */
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_ACTIVE_LOCALITY |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* l - 1 should show that it has BEEN_SEIZED */
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access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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TPM_TIS_ACCESS_BEEN_SEIZED |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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/* clear the BEEN_SEIZED flag and make sure it's gone */
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tpm_tis_i2c_writeb(l - 1, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_BEEN_SEIZED);
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access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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}
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/*
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* PENDING_REQUEST will not be set if locty = 0 since all localities
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* were active; in case of locty = 1, locality 0 will be active
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* but no PENDING_REQUEST anywhere
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*/
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if (locty <= 1) {
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pending_request_flag = 0;
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}
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/* release access from l - 1; this activates locty - 1 */
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l--;
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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DPRINTF("%s: %d: relinquishing control on l = %d\n",
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__func__, __LINE__, l);
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tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
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TPM_TIS_ACCESS_ACTIVE_LOCALITY);
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
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DPRINTF_ACCESS;
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g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
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pending_request_flag |
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TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
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for (l = locty - 1; l >= 0; l--) {
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access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
|
|
DPRINTF_ACCESS;
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
|
|
pending_request_flag |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
|
|
/* release this locality */
|
|
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
|
|
|
|
if (l == 1) {
|
|
pending_request_flag = 0;
|
|
}
|
|
}
|
|
|
|
/* no locality may be active now */
|
|
for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
|
|
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
|
|
DPRINTF_ACCESS;
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Test case for getting access when higher number locality relinquishes access
|
|
*/
|
|
static void tpm_tis_i2c_test_check_access_reg_release(const void *data)
|
|
{
|
|
int locty, l;
|
|
uint8_t access;
|
|
uint8_t pending_request_flag;
|
|
|
|
/* do not test locality 4 (hw only) */
|
|
for (locty = TPM_TIS_NUM_LOCALITIES - 2; locty >= 0; locty--) {
|
|
pending_request_flag = 0;
|
|
|
|
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
|
|
/* request use of locality */
|
|
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
|
|
TPM_TIS_ACCESS_REQUEST_USE);
|
|
access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
|
|
/* request use of all other localities */
|
|
for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {
|
|
if (l == locty) {
|
|
continue;
|
|
}
|
|
/*
|
|
* request use of locality 'l' -- we MUST see REQUEST USE and
|
|
* may see PENDING_REQUEST
|
|
*/
|
|
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
|
|
TPM_TIS_ACCESS_REQUEST_USE);
|
|
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
|
|
DPRINTF_ACCESS;
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_REQUEST_USE |
|
|
pending_request_flag |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;
|
|
}
|
|
/* release locality 'locty' */
|
|
tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
|
|
/*
|
|
* highest locality should now be active; release it and make sure the
|
|
* next highest locality is active afterwards
|
|
*/
|
|
for (l = TPM_TIS_NUM_LOCALITIES - 2; l >= 0; l--) {
|
|
if (l == locty) {
|
|
continue;
|
|
}
|
|
/* 'l' should be active now */
|
|
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
|
|
DPRINTF_ACCESS;
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
|
|
pending_request_flag |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
/* 'l' relinquishes access */
|
|
tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY);
|
|
access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);
|
|
DPRINTF_ACCESS;
|
|
if (l == 1 || (locty <= 1 && l == 2)) {
|
|
pending_request_flag = 0;
|
|
}
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
pending_request_flag |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Test case for transmitting packets
|
|
*/
|
|
static void tpm_tis_i2c_test_check_transmit(const void *data)
|
|
{
|
|
const TPMTestState *s = data;
|
|
uint8_t access;
|
|
uint32_t sts, v;
|
|
uint16_t bcount, csum, bcount2;
|
|
size_t i;
|
|
|
|
/* enable csum */
|
|
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);
|
|
/* check csum enable register has bit 0 set */
|
|
v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
|
|
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
|
|
/* reading it as 32bit register returns same result */
|
|
v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
|
|
g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
|
|
|
|
/* request use of locality 0 */
|
|
tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);
|
|
access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
|
|
g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
|
|
TPM_TIS_ACCESS_ACTIVE_LOCALITY |
|
|
TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
|
|
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
DPRINTF_STS;
|
|
|
|
g_assert_cmpint(sts & 0xff, ==, 0);
|
|
|
|
bcount = (sts >> 8) & 0xffff;
|
|
g_assert_cmpint(bcount, >=, 128);
|
|
|
|
/* read bcount from STS + 1 must work also */
|
|
bcount2 = tpm_tis_i2c_readw(0, TPM_I2C_REG_STS + 1);
|
|
g_assert_cmpint(bcount, ==, bcount2);
|
|
|
|
/* ic2 must have bits 26-31 zero */
|
|
g_assert_cmpint(sts & (0x1f << 26), ==, 0);
|
|
|
|
tpm_tis_i2c_writel(0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY);
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
DPRINTF_STS;
|
|
g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_COMMAND_READY);
|
|
|
|
/* transmit command */
|
|
for (i = 0; i < sizeof(TPM_CMD); i++) {
|
|
tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
DPRINTF_STS;
|
|
if (i < sizeof(TPM_CMD) - 1) {
|
|
g_assert_cmpint(sts & 0xff, ==,
|
|
TPM_TIS_STS_EXPECT | TPM_TIS_STS_VALID);
|
|
} else {
|
|
g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_VALID);
|
|
}
|
|
g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);
|
|
}
|
|
/* read the checksum */
|
|
csum = tpm_tis_i2c_readw(0, TPM_I2C_REG_DATA_CSUM_GET);
|
|
g_assert_cmpint(csum, ==, 0x6733);
|
|
|
|
/* start processing */
|
|
tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);
|
|
|
|
uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;
|
|
do {
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {
|
|
break;
|
|
}
|
|
} while (g_get_monotonic_time() < end_time);
|
|
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
DPRINTF_STS;
|
|
g_assert_cmpint(sts & 0xff, == ,
|
|
TPM_TIS_STS_VALID | TPM_TIS_STS_DATA_AVAILABLE);
|
|
bcount = (sts >> 8) & 0xffff;
|
|
|
|
/* read response */
|
|
uint8_t tpm_msg[sizeof(struct tpm_hdr)];
|
|
g_assert_cmpint(sizeof(tpm_msg), ==, bcount);
|
|
|
|
for (i = 0; i < sizeof(tpm_msg); i++) {
|
|
tpm_msg[i] = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_FIFO);
|
|
sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);
|
|
DPRINTF_STS;
|
|
if (sts & TPM_TIS_STS_DATA_AVAILABLE) {
|
|
g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);
|
|
}
|
|
}
|
|
g_assert_cmpmem(tpm_msg, sizeof(tpm_msg), s->tpm_msg, sizeof(*s->tpm_msg));
|
|
|
|
/* relinquish use of locality 0 */
|
|
tpm_tis_i2c_writeb(0,
|
|
TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY);
|
|
access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
|
|
}
|
|
|
|
int main(int argc, char **argv)
|
|
{
|
|
int ret;
|
|
char *args;
|
|
char *tmp_path = g_dir_make_tmp("qemu-tpm-tis-i2c-test.XXXXXX", NULL);
|
|
GThread *thread;
|
|
TPMTestState test;
|
|
|
|
module_call_init(MODULE_INIT_QOM);
|
|
g_test_init(&argc, &argv, NULL);
|
|
|
|
test.addr = g_new0(SocketAddress, 1);
|
|
test.addr->type = SOCKET_ADDRESS_TYPE_UNIX;
|
|
test.addr->u.q_unix.path = g_build_filename(tmp_path, "sock", NULL);
|
|
g_mutex_init(&test.data_mutex);
|
|
g_cond_init(&test.data_cond);
|
|
test.data_cond_signal = false;
|
|
test.tpm_version = TPM_VERSION_2_0;
|
|
|
|
thread = g_thread_new(NULL, tpm_emu_ctrl_thread, &test);
|
|
tpm_emu_test_wait_cond(&test);
|
|
|
|
aspeed_bus_addr = ast2600_i2c_calc_bus_addr(I2C_DEV_BUS_NUM);
|
|
|
|
args = g_strdup_printf(
|
|
"-machine rainier-bmc -accel tcg "
|
|
"-chardev socket,id=chr,path=%s "
|
|
"-tpmdev emulator,id=tpm0,chardev=chr "
|
|
"-device tpm-tis-i2c,tpmdev=tpm0,bus=aspeed.i2c.bus.%d,address=0x%x",
|
|
test.addr->u.q_unix.path,
|
|
I2C_DEV_BUS_NUM,
|
|
I2C_SLAVE_ADDR);
|
|
qtest_start(args);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/test_basic", &test,
|
|
tpm_tis_i2c_test_basic);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/test_check_localities", &test,
|
|
tpm_tis_i2c_test_check_localities);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/check_access_reg", &test,
|
|
tpm_tis_i2c_test_check_access_reg);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/check_access_reg_seize", &test,
|
|
tpm_tis_i2c_test_check_access_reg_seize);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/check_access_reg_release", &test,
|
|
tpm_tis_i2c_test_check_access_reg_release);
|
|
|
|
qtest_add_data_func("/tpm-tis-i2c/test_check_transmit", &test,
|
|
tpm_tis_i2c_test_check_transmit);
|
|
|
|
ret = g_test_run();
|
|
|
|
qtest_end();
|
|
|
|
g_thread_join(thread);
|
|
g_unlink(test.addr->u.q_unix.path);
|
|
qapi_free_SocketAddress(test.addr);
|
|
g_rmdir(tmp_path);
|
|
g_free(tmp_path);
|
|
g_free(args);
|
|
return ret;
|
|
}
|