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131 lines
4.0 KiB
C
131 lines
4.0 KiB
C
/*
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* QTest testcase for the CMSDK APB dualtimer device
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*
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* Copyright (c) 2021 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include "qemu/osdep.h"
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#include "libqtest-single.h"
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/* IoTKit/ARMSSE dualtimer; driven at 25MHz in mps2-an385, so 40ns per tick */
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#define TIMER_BASE 0x40002000
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#define TIMER1LOAD 0
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#define TIMER1VALUE 4
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#define TIMER1CONTROL 8
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#define TIMER1INTCLR 0xc
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#define TIMER1RIS 0x10
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#define TIMER1MIS 0x14
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#define TIMER1BGLOAD 0x18
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#define TIMER2LOAD 0x20
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#define TIMER2VALUE 0x24
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#define TIMER2CONTROL 0x28
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#define TIMER2INTCLR 0x2c
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#define TIMER2RIS 0x30
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#define TIMER2MIS 0x34
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#define TIMER2BGLOAD 0x38
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#define CTRL_ENABLE (1 << 7)
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#define CTRL_PERIODIC (1 << 6)
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#define CTRL_INTEN (1 << 5)
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#define CTRL_PRESCALE_1 (0 << 2)
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#define CTRL_PRESCALE_16 (1 << 2)
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#define CTRL_PRESCALE_256 (2 << 2)
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#define CTRL_32BIT (1 << 1)
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#define CTRL_ONESHOT (1 << 0)
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static void test_dualtimer(void)
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{
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g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0);
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/* Start timer: will fire after 40000 ns */
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writel(TIMER_BASE + TIMER1LOAD, 1000);
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/* enable in free-running, wrapping, interrupt mode */
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writel(TIMER_BASE + TIMER1CONTROL, CTRL_ENABLE | CTRL_INTEN);
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/* Step to just past the 500th tick and check VALUE */
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clock_step(500 * 40 + 1);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 500);
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/* Just past the 1000th tick: timer should have fired */
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clock_step(500 * 40);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 1);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0);
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/*
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* We are in free-running wrapping 16-bit mode, so on the following
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* tick VALUE should have wrapped round to 0xffff.
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*/
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clock_step(40);
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g_assert_cmphex(readl(TIMER_BASE + TIMER1VALUE), ==, 0xffff);
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/* Check that any write to INTCLR clears interrupt */
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writel(TIMER_BASE + TIMER1INTCLR, 1);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
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/* Turn off the timer */
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writel(TIMER_BASE + TIMER1CONTROL, 0);
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}
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static void test_prescale(void)
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{
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g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0);
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/* Start timer: will fire after 40 * 256 * 1000 == 1024000 ns */
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writel(TIMER_BASE + TIMER2LOAD, 1000);
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/* enable in periodic, wrapping, interrupt mode, prescale 256 */
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writel(TIMER_BASE + TIMER2CONTROL,
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CTRL_ENABLE | CTRL_INTEN | CTRL_PERIODIC | CTRL_PRESCALE_256);
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/* Step to just past the 500th tick and check VALUE */
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clock_step(40 * 256 * 501);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 500);
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/* Just past the 1000th tick: timer should have fired */
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clock_step(40 * 256 * 500);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 1);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 0);
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/* In periodic mode the tick VALUE now reloads */
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clock_step(40 * 256);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 1000);
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/* Check that any write to INTCLR clears interrupt */
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writel(TIMER_BASE + TIMER2INTCLR, 1);
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g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
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/* Turn off the timer */
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writel(TIMER_BASE + TIMER2CONTROL, 0);
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}
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int main(int argc, char **argv)
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{
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int r;
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g_test_init(&argc, &argv, NULL);
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qtest_start("-machine mps2-an385");
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qtest_add_func("/cmsdk-apb-dualtimer/dualtimer", test_dualtimer);
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qtest_add_func("/cmsdk-apb-dualtimer/prescale", test_prescale);
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r = g_test_run();
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qtest_end();
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return r;
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}
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