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102 lines
3.1 KiB
C
102 lines
3.1 KiB
C
/*
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* Arm specific proc functions for linux-user
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef ARM_TARGET_PROC_H
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#define ARM_TARGET_PROC_H
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static int open_cpuinfo(CPUArchState *cpu_env, int fd)
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{
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ARMCPU *cpu = env_archcpu(cpu_env);
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int arch, midr_rev, midr_part, midr_var, midr_impl;
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target_ulong elf_hwcap = get_elf_hwcap();
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target_ulong elf_hwcap2 = get_elf_hwcap2();
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const char *elf_name;
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int num_cpus, len_part, len_var;
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#if TARGET_BIG_ENDIAN
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# define END_SUFFIX "b"
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#else
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# define END_SUFFIX "l"
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#endif
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arch = 8;
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elf_name = "v8" END_SUFFIX;
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midr_rev = FIELD_EX32(cpu->midr, MIDR_EL1, REVISION);
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midr_part = FIELD_EX32(cpu->midr, MIDR_EL1, PARTNUM);
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midr_var = FIELD_EX32(cpu->midr, MIDR_EL1, VARIANT);
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midr_impl = FIELD_EX32(cpu->midr, MIDR_EL1, IMPLEMENTER);
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len_part = 3;
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len_var = 1;
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#ifndef TARGET_AARCH64
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/* For simplicity, treat ARMv8 as an arm64 kernel with CONFIG_COMPAT. */
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if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
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if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
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arch = 7;
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midr_var = (cpu->midr >> 16) & 0x7f;
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len_var = 2;
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if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
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elf_name = "armv7m" END_SUFFIX;
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} else {
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elf_name = "armv7" END_SUFFIX;
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}
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} else {
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midr_part = cpu->midr >> 4;
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len_part = 7;
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if (arm_feature(&cpu->env, ARM_FEATURE_V6)) {
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arch = 6;
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elf_name = "armv6" END_SUFFIX;
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} else if (arm_feature(&cpu->env, ARM_FEATURE_V5)) {
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arch = 5;
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elf_name = "armv5t" END_SUFFIX;
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} else {
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arch = 4;
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elf_name = "armv4" END_SUFFIX;
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}
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}
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}
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#endif
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#undef END_SUFFIX
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num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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for (int i = 0; i < num_cpus; i++) {
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dprintf(fd,
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"processor\t: %d\n"
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"model name\t: ARMv%d Processor rev %d (%s)\n"
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"BogoMIPS\t: 100.00\n"
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"Features\t:",
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i, arch, midr_rev, elf_name);
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for (target_ulong j = elf_hwcap; j ; j &= j - 1) {
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dprintf(fd, " %s", elf_hwcap_str(ctz64(j)));
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}
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for (target_ulong j = elf_hwcap2; j ; j &= j - 1) {
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dprintf(fd, " %s", elf_hwcap2_str(ctz64(j)));
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}
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dprintf(fd, "\n"
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"CPU implementer\t: 0x%02x\n"
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"CPU architecture: %d\n"
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"CPU variant\t: 0x%0*x\n",
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midr_impl, arch, len_var, midr_var);
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if (arch >= 7) {
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dprintf(fd, "CPU part\t: 0x%0*x\n", len_part, midr_part);
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}
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dprintf(fd, "CPU revision\t: %d\n\n", midr_rev);
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}
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if (arch < 8) {
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dprintf(fd, "Hardware\t: QEMU v%s %s\n", QEMU_VERSION,
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cpu->dtb_compatible ? : "");
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dprintf(fd, "Revision\t: 0000\n");
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dprintf(fd, "Serial\t\t: 0000000000000000\n");
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}
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return 0;
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}
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#define HAVE_ARCH_PROC_CPUINFO
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#endif /* ARM_TARGET_PROC_H */
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