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50 lines
1.7 KiB
C
50 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Target dependent generic vector operation expansion
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*
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* Copyright (c) 2018 Linaro
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*/
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#ifndef TCG_TCG_OP_GVEC_H
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#define TCG_TCG_OP_GVEC_H
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#include "tcg/tcg-op-gvec-common.h"
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#ifndef TARGET_LONG_BITS
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#error must include QEMU headers
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#endif
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#if TARGET_LONG_BITS == 64
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#define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i64
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#define tcg_gen_vec_add8_tl tcg_gen_vec_add8_i64
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#define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i64
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#define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64
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#define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64
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#define tcg_gen_vec_add32_tl tcg_gen_vec_add32_i64
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#define tcg_gen_vec_sub32_tl tcg_gen_vec_sub32_i64
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#define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i64
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#define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i64
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#define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i64
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#define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i64
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#define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i64
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#define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i64
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#elif TARGET_LONG_BITS == 32
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#define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32
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#define tcg_gen_vec_add8_tl tcg_gen_vec_add8_i32
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#define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i32
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#define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32
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#define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32
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#define tcg_gen_vec_add32_tl tcg_gen_add_i32
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#define tcg_gen_vec_sub32_tl tcg_gen_sub_i32
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#define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i32
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#define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i32
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#define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i32
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#define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i32
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#define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i32
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#define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i32
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#else
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# error
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#endif
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#endif
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